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TMS320DM6431 Datasheet(PDF) 38 Page - Texas Instruments |
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TMS320DM6431 Datasheet(HTML) 38 Page - Texas Instruments |
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38 / 227 page ![]() TMS320DM6431 Digital Media Processor SPRS342C – NOVEMBER 2006 – REVISED JUNE 2008 www.ti.com Table 2-14. VPFE Terminal Functions SIGNAL TYPE(1) OTHER(2)(3) DESCRIPTION ZWT ZDU NAME NO. NO. VIDEO/IMAGE IN (VPFE) This pin is multiplexed between the VPFE (CCDC) and GPIO. IPD In VPFE mode, this pin is the pixel clock input (PCLK) used to load PCLK/GP[54] A14 A18 I/O/Z DVDD33 image data into the CCD Controller (CCDC) on pins CI[7:0] and YI[7:0]. This pin is multiplexed between the VPFE (CCDC) and GPIO. IPD In VPFE mode, this pin is the vertical synchronization signal (VD) that VD/GP[53] A13 A17 I/O/Z DVDD33 can be either an input (slave mode) or an output (master mode), which signals the start of a new frame to the CCDC. This pin is multiplexed between the VPFE (CCDC) and GPIO. IPD In VPFE mode, this pin is the horizontal synchronization signal (HD) HD/GP[52] A15 A19 I/O/Z DVDD33 that can be either an input (slave mode) or an output (master mode), which signals the start of a new line to the CCDC. This pin is multiplexed between the VPFE (CCDC), EMIFA, and GPIO. CI1(CCD9)/ IPD B12 C14 I/O/Z This pin is CCDC input CI1 and it supports several modes: EM_A[19]/GP[45] DVDD33 In 10-bit CCD Raw mode, it is input CCD9. In 8-bit YCbCr mode, this pin should not be used. This pin is multiplexed between the VPFE (CCDC), EMIFA, and GPIO. CI0(CCD8)/ IPD C12 C15 I/O/Z This pin is CCDC input CI0 and it supports several modes: EM_A[20]//GP[44] DVDD33 In 10-bit CCD Raw mode, it is input CCD8. In 8-bit YCbCr mode, this pin should not be used. This pin is multiplexed between the VPFE (CCDC) and GPIO. This pin is CCDC input YI7 and it supports several modes: YI7(CCD7)/ IPD A12 A15 I/O/Z GP[43] DVDD33 In 10-bit CCD Raw mode, it is input CCD7. In 8-bit YCbCr mode, it is time multiplexed between Y7, CB7, and CR7 of the lower 8-bit channel. This pin is multiplexed between the VPFE (CCDC) and GPIO. This pin is CCDC input YI6 and it supports several modes: YI6(CCD6)/ IPD B13 B15 I/O/Z GP[42] DVDD33 In 10-bit CCD Raw mode, it is input CCD6. In 8-bit YCbCr mode, it is time multiplexed between Y6, CB6, and CR6 of the lower 8-bit channel. This pin is multiplexed between the VPFE (CCDC) and GPIO. This pin is CCDC input YI5 and it supports several modes: YI5(CCD5)/ IPD C13 B16 I/O/Z GP[41] DVDD33 In 10-bit CCD Raw mode, it is input CCD5. In 8-bit YCbCr mode, it is time multiplexed between Y5, CB5, and CR5 of the lower 8-bit channel. (1) I = Input, O = Output, Z = High impedance, S = Supply voltage, GND = Ground, A = Analog signal (2) IPD = Internal pulldown, IPU = Internal pullup. For more detailed information on pullup/pulldown resistors and situations where external pullup/pulldown resistors are required, see Section 3.9.1, Pullup/Pulldown Resistors. (3) Specifies the operating I/O supply voltage for each signal 38 Device Overview Submit Documentation Feedback |
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