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CY7C66013-PVC Datasheet(PDF) 35 Page - Cypress Semiconductor

Part # CY7C66013-PVC
Description  Full-Speed USB (12 Mbps) Peripheral Controller with Integrated Hub
PDF  58 Pages
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Manufacturer  CYPRESS [Cypress Semiconductor]
Direct Link  http://www.cypress.com
Logo CYPRESS - Cypress Semiconductor

CY7C66013-PVC Datasheet(HTML) 35 Page - Cypress Semiconductor

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CY7C66013
CY7C66113
Document #: 38-08024 Rev. *A
Page 35 of 58
Bit [0..6] : Port x Connect Status (where x = 1..7)
When set to 1, Port x is connected; When set to 0, Port x is disconnected.
Bit 7 : Reserved.
Set to 0.
The Hub Ports Connect Status register is cleared to zero by reset or USB bus reset, then set to match the hardware configuration
by the hub repeater hardware. The Reserved bit [7] should always read as ‘0’ to indicate no connection.
Hub Ports Speed
ADDRESS
0x4A
Bit [0..6] : Port x Speed (where x = 1..7)
Set to 1 if the device plugged in to Port x is Low Speed; Set to 0 if the device plugged in to Port x is Full Speed.
Bit 7 : Reserved.
Set to 0.
The Hub Ports Speed register is cleared to zero by reset or bus reset. This must be set by the firmware on issuing a port reset.
The Reserved bit [7] should always read as ‘0.’
18.2
Enabling/Disabling a USB Device
After a USB device connection has been detected, firmware must update status change bits in the hub status change data
structure that is polled periodically by the USB host. The host responds by sending a packet that instructs the hub to reset and
enable the downstream port. Firmware then sets the bit in the Hub Ports Enable register, Figure 18-3, for the downstream port.
The hub repeater hardware responds to an enable bit in the Hub Ports Enable register by enabling the downstream port, so that
USB traffic can flow to and from that port.
If a port is marked enabled and is not suspended, it receives all USB traffic from the upstream port, and USB traffic from the
downstream port is passed to the upstream port (unless babble is detected). Low-speed ports do not receive full-speed traffic
from the upstream port.
When firmware writes to the Hub Ports Enable register to enable a port, the port is not enabled until the end of any packet currently
being transmitted. If there is no USB traffic, the port is enabled immediately.
When a USB device disconnection has been detected, firmware must update status bits in the hub change status data structure
that is polled periodically by the USB host. In suspend, a connect or disconnect event generates an interrupt (if the hub interrupt
is enabled) even if the port is disabled.
Hub Ports Enable Register
ADDRESS
0x49
Bit [0..6] : Port x Enable (where x = 1..7)
Set to 1 if Port x is enabled; Set to 0 if Port x is disabled.
Bit 7 : Reserved.
Set to 0.
The Hub Ports Enable register is cleared to zero by reset or bus reset to disable all downstream ports as the default condition.
A port is also disabled by internal hub hardware (enable bit cleared) if babble is detected on that downstream port. Babble is
defined as:
• Any non-idle downstream traffic on an enabled downstream port at EOF2
• Any downstream port with upstream connectivity established at EOF2 (i.e., no EOP received by EOF2).
18.3
Hub Downstream Ports Status and Control
Data transfer on hub downstream ports is controlled according to the bit settings of the Hub Downstream Ports Control Register
(Figure 18-4). Each downstream port is controlled by two bits, as defined in Table 18-1 below. The Hub Downstream Ports Control
Bit #
765
43
21
0
Bit Name
Reserved
Port 7 Speed
Port 6 Speed
Port 5 Speed
Port 4 Speed
Port 3 Speed
Port 2 Speed
Port 1 Speed
Read/Write
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
000
00
00
0
Figure 18-2. Hub Ports Speed
Bit #
765
43
21
0
Bit Name
Reserved
Port 7 Enable
Port 6 Enable
Port 5 Enable
Port 4 Enable
Port 3 Enable
Port 2 Enable
Port 1 Enable
Read/Write
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
000
00
00
0
Figure 18-3. Hub Ports Enable Register



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