AD9925BBCZ datasheet(51/96 Pages) AD

Part #	AD9925BBCZ

Description	CCD Signal Processor with Vertical Driver and Precision Timing Generator

PDF	96 Pages

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Manufacturer	AD [Analog Devices]

Direct Link	http://www.analog.com

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51 / 96 page

AD9925

Rev. A | Page 51 of 96

POWER-UP AND SYNCHRONIZATION

Vertical Driver Power Supply Sequencing

The recommended Power-Up and Power-Down sequences are

shown in Figure 65 and Figure 66, respectively. As shown, the

VM1 and VM2 voltage levels should never exceed the VH1 and

VH2 voltage levels during power-up or power-down. Excessive

current will result if this requirement is not met due to a PN

junction diode turning on between the VM1/VM2 and VH

supply pins.

VH1 = VH2 = 12.0V TO 15.0V

DD = TCVDD = AVDD = 3.0V

VM1 = VM2 = –1.0V TO –0.5V

VL = –7.5V

SAME TIME AS VM AND VH; LATER OR EARLIER IS OK, BUT NOT BEFORE VDD REACHES 3.0V.

VDVDD = DVDD = DRVDD = HVDD = RGV

Figure 65. Power-Up Sequence

VH1 = VH2

VDVDD = DVDD = DRVDD = HVDD = RGVDD = TCVDD = AVDD = 3V

VM1 = VM2

SAME TIME AS VM AND VH OR EARLIER, BUT NOT AFTER VDD.

n Sequence

Figure 66. Power-Dow

AD9925BBCZ Datasheet(PDF) 51 Page - Analog Devices