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DA9213, DA9214, and DA9215

Multi-Phase 5A/Phase DC-DC Buck Converter

Datasheet

Revision 2.2

23-Oct-2017

CFR0011-120-00

28 of 62

7.2.4

GPIO Extender

DA9213, DA9214, and DA9215 include a GPIO extender that offers up to five 5 V-tolerant general

purpose input/output ports. Each port is controlled via registers from the host processor.

The GPIO3 and GPI4 ports are pin-shared with the 4-WIRE Control Interface. For instance, if

GPIO3_PIN = 01, GPI4_PIN = 01 (Interface selected), the GPIO3 and GPI4 ports will be exclusively

dedicated to output and chip select signaling for 4-WIRE purposes. If the alternative function is

selected, all GPIOs configuration as per registers 0x58 to 0x5A and 0x145 will be ignored.

GPIs are supplied from the internal rail VDDCORE or VDDIO (selected via GPI_V) and can be

configured to be active high or active low (selected via GPIOx_TYPE). The input signals can be

debounced or directly change the state of the assigned status register GPIx to high or low, according

to the setting of GPIOx_MODE. The debouncing time is configurable via control DEBOUNCE

(10 ms default).

Whenever the status has changed to its configured active state (edge sensitive), the assigned event

Whenever DA9213, DA9214, and DA9215 is enabled and enters ON mode (also when enabled

changing the setting of GPIOx_PIN) the GPI status bits are initiated towards their configured passive

state. This ensures that already active signals are detected, and that they create an event

immediately after the GPI comparators are enabled.

The buck enable signal (BUCKx_EN) can be controlled directly via a GPI, if so configured in the

BUCKA_GPI and BUCKB_GPI registers. If it is required that GPI ports do not generate an event

when configured for the HW control of the switching regulator, the relative mask bit should be set.

GPIs can alternatively be selected to toggle the VBUCKA_SEL and VBUCKB_SEL from rising and

falling edges at these inputs. Apart from changing the regulator output voltage this also provides

hardware control of the regulator mode (normal/low power mode) from the settings of BUCKA_SL_A,

BUCKA_SL_B, BUCKB_SL_A, and BUCKB_SL_B (enabled if BUCKA_MODE or BUCKB_MODE =

‘00’).

All GPI ports have the additional option of activating a 100 kΩ pull-down resistor via GPIOx_PUPD,

which ensures a well-defined level in case the input is not actively driven.

If enabled via ADDR_SEL_CONF, the I

2C address selection can be assigned to a specific GPI. An

active voltage level at the selected GPI configures the slave address of DA9213, DA9214, and

DA9215 to IF_BASE_ADDR1 while a passive voltage level configures the slave address to

IF_BASE_ADDR2. If no GPI is selected then the IF_BASE_ADDR1 is automatically used.

If defined as an output, GPIOs can be configured to be open-drain or push-pull. If configured as push

pull, the supply rail is VDDIO. By disabling the internal 120 kΩ pull-up resistor in open-drain mode,

the GPO can also be supplied from an external rail. The output state will be assigned as configured

by the GPIO register bit GPIOx_MODE.

A specific power good port for each of the buck converters can be configured via BUCKA_PG_SEL

and BUCKB_PG_SEL. The respective port must be configured as GPO for correct operation. If

assigned to the same GPO, it is necessary that the power good indicators for Buck A and Buck B are

both active (supply voltages in range) to assert the overall power good. The signal will be released as

soon as one of the single power good signals is not active (that is, at least one supply is out of

range).

The power good signaling should not be used in conjunction with fast start up rates, configured in

BUCKx_UP_CTRL register fields.

Once enabled via RELOAD_FUNC_EN the GPIO0 can be used as input port to operate a partial

OTP download. When the input level is changed to active, the registers 0x5D, 0x5E, 0xD1 to 0xDA

are updated to their OTP default. This allows a complete buck re-configuration that resets all the

changes done to those registers previously (soft reset). If the buck should be kept on during the soft

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