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TMS320VC5503 Datasheet(PDF) 49 Page - Texas Instruments |
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TMS320VC5503 Datasheet(HTML) 49 Page - Texas Instruments |
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49 / 123 page  Functional Overview 49 April 2004 − Revised January 2005 SPRS245C Table 3−18. DMA Configuration Registers PORT ADDRESS (WORD) REGISTER NAME DESCRIPTION RESET VALUE† GLOBAL REGISTER 0x0E00 DMA_GCR[2:0] DMA Global Control Register xxxx xxxx xxxx x000 0x0E02 DMA_GSCR DMA Software Compatibility Register 0x0E03 DMA_GTCR DMA Timeout Control Register CHANNEL #0 REGISTERS 0x0C00 DMA_CSDP0 DMA Channel 0 Source Destination Parameters Register 0000 0000 0000 0000 0x0C01 DMA_CCR0[15:0] DMA Channel 0 Control Register 0000 0000 0000 0000 0x0C02 DMA_CICR0[5:0] DMA Channel 0 Interrupt Control Register xxxx xxxx xx00 0011 0x0C03 DMA_CSR0[6:0] DMA Channel 0 Status Register xxxx xxxx xx00 0000 0x0C04 DMA_CSSA_L0 DMA Channel 0 Source Start Address Register (lower bits) Undefined 0x0C05 DMA_CSSA_U0 DMA Channel 0 Source Start Address Register (upper bits) Undefined 0x0C06 DMA_CDSA_L0 DMA Channel 0 Source Destination Address Register (lower bits) Undefined 0x0C07 DMA_CDSA_U0 DMA Channel 0 Source Destination Address Register (upper bits) Undefined 0x0C08 DMA_CEN0 DMA Channel 0 Element Number Register Undefined 0x0C09 DMA_CFN0 DMA Channel 0 Frame Number Register Undefined 0x0C0A DMA_CSFI0 DMA Channel 0 Source Frame Index Register Undefined 0x0C0B DMA_CSEI0 DMA Channel 0 Source Element Index Register Undefined 0x0C0C DMA_CSAC0 DMA Channel 0 Source Address Counter Undefined 0x0C0D DMA_CDAC0 DMA Channel 0 Destination Address Counter Undefined 0x0C0E DMA_CDEI0 DMA Channel 0 Destination Element Index Register Undefined 0x0C0F DMA_CDFI0 DMA Channel 0 Destination Frame Index Register Undefined † Hardware reset: x denotes a “don’t care.” |
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