DLPC3470 datasheet(33/70 Pages) TI1

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VSYNC

Parallel Input

Displayed Pattern

[Frame N]

PDATA 7:0

Illuminator

Trigger Out 1

(Frame Trigger)

Trigger Out 2

(Sub-frame Trigger)

[Frame N]

PDATA 15:8

[Frame N]

PDATA 23:16

[Frame N+1] PDATA 23:0

[Frame N+2] PDATA 23:0

[Frame N+1]

PDATA 7:0

[Frame N+1]

PDATA 15:8

[Frame N+1]

PDATA 23:16

tD1

tD2

tD1

tD2

33%

BLUE LED

DLPC3470

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DLPS110 – APRIL 2018

Product Folder Links: DLPC3470

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tD1 is the configurable delay for the frame trigger

tD2 is the configurable delay for the sub-frame trigger

Figure 15. 3 × 8-bit (Blue) Pattern Configurations

•

3 × 8-bit patterns are displayed within each input VSYNC. Sum of dark time and exposure time for the three

patterns is always same.

•

Dark time is configured as zero and exposure time for each pattern is 33% of input frame time. Total

exposure time and dark time must be equal to input frame time.

•

Blue LED is configured to be ON for the patterns. TRIG_OUT_1. TRIG_OUT_1 is configured as edge type

and active high polarity.

•

TRIG_OUT_1 is configured as edge type and active high polarity.TRIG_OUT_1 delay (tD1) is configured with

respect to input VSYNC and is set once per input frame. TRIG_OUT_2.

•

TRIG_OUT_2 is also configured as edge type and active high polarity. TRIG_OUT_2 delay (tD2) is configured

with reference to the start of the pattern and is set once per pattern within a frame.

Figure 16 shows a configuration with 2 × 8-bit patterns

DLPC3470 Datasheet(PDF) 33 Page - Texas Instruments

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