TDA9554PS datasheet(29/125 Pages) PHILIPS

29 / 125 page

2000 Jun 22

Philips Semiconductors

Tentative Device Speciﬁcation

TV signal processor-Teletext decoder with

embedded

µ-Controller

TDA955X/6X/8X PS/N1 series

TXT19

TEN

TC<2>

TC<1>

TC<0>

TS<1>

TS<0>

00H

TEN

0 - Disable Twist function

1- Enable Twist character set

TC<2:0>

Language control bits (C12/C13/C14) that has Twisted character set

TS<1:0>

Twist Character set selection

TXT20

DRCS

ENABLE

OSD

PLANES

OSD

LANG

ENABLE

OSD

LAN<2>

OSD

LAN<1>

OSD

LAN<0>

00H

DRCS ENABLE

0 - Normal OSD characters used

1 - Re-map column 9 to DRCS (TXT and CC modes),

OSD PLANES

0 - Character code columns 8 and 9 deﬁned as single plane characters

1- Character code columns 8 and 9 deﬁned as double plane characters

OSD LANG

ENABLE

Enable use of OSD LAN<2:0> to deﬁne language option for display, instead of C12/C13/C14

OSD LAN<2:0>

Alternative C12/C13/C14 bits for use with OSD menus

TXT21

DISP

LINES<1>

DISP

LINES<0>

CHAR

SIZE<1>

CHAR

SIZE<0>

Reserved

CC ON

I2C PORT0

CC/TXT

02H

DISP

LINES<1:0>

The number of display lines per character row.

00 - 10 lines per character (defaults to 9 lines in 525 mode)

01 - 13 lines per character

10 - 16 lines per character

11 - reserved

CHAR

SIZE<1:0>

Character matrix size.

00 - 10 lines per character (matrix 12x10)

01 - 13 lines per character (matrix 12x13)

10 - 16lines per character (matrix 12x16)

11 - reserved

CCON

0 - Closed Caption acquisition off

1 - Closed Caption acquisition on

I2C PORT0

0 - Disable I2C PORT0

1 - Enable I2C PORT0 selection (P1.7/SDA0, P1.6/SCL0)

CC/TXT

0 - Display conﬁgured for TXT mode

1 - Display conﬁgured for CC mode

TXT22

GPF<7>

GPF<6>

GPF<5>

GPF<4>

GPF<3>

GPF<2>

GPF<1>

GPF<0>

XXH

GPF<7:6>

General purpose register, bits deﬁned by mask programmable bits

GPF<5>

0 - Standard Painter device

1 - Enhanced Painter device

GPF<4> (Used

for software only)

0 - Choose 6 page teletext device

1 - Choose 10 page teletext device

GPF<3>

0 - PWM0, PWM1, PWM2 & PWM3 output on Port 3.0 to Port 3.3 respectively

1 - PWM0, PWM1, PWM2 & PWM3 output on Port 2.1 to Port 2.4 respectively

Names

BIT7

BIT6

BIT5

BIT4

BIT3

BIT2

BIT1

BIT0

RESET

Table 3

SFR Bit description

TDA9554PS Datasheet(PDF) 29 Page - NXP Semiconductors

TDA9554PS Datasheet(HTML) 29 Page - NXP Semiconductors

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL