MMPF0100Z datasheet(23/128 Pages) NXP

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NXP Semiconductors

PF0100Z

FUNCTIONAL BLOCK REQUIREMENTS AND BEHAVIORS

6.2

16 MHz and 32 kHz clocks

There are two clocks: a trimmed 16 MHz, RC oscillator and an untrimmed 32 kHz, RC oscillator. The 16 MHz oscillator is specified within

-8.0%/+8.0%. The 32 kHz untrimmed clock is only used in the following conditions:

• VIN < UVDET

• All regulators are in sleep mode

• All regulators are in PFM switching mode

A 32 kHz clock, derived from the 16 MHz trimmed clock, is used when accurate timing is needed under the following conditions:

• During start-up, VIN > UVDET

• PWRON_CFG = 1, for power button debounce timing

In addition, when the 16 MHz is active in the on mode, the debounce times in Table 26 are referenced to the 32 kHz derived from the

16 MHz clock. The exceptions are the LOWVINI and PWRONI interrupts, which are referenced to the 32 kHz untrimmed clock.

6.2.1

Clock adjustment

The 16 MHz clock and hence the switching frequency of the regulators, can be adjusted to improve the noise integrity of the system. By

changing the factory trim values of the 16 MHz clock, the user may add an offset as small as

±3% of the nominal frequency. Contact your

NXP representative for detailed information on this feature.

6.3

Bias and references block description

6.3.1

Internal core voltage references

All regulators use the main bandgap as the reference. The main bandgap is bypassed with a capacitor at VCOREREF. The bandgap and

the rest of the core circuitry are supplied from VCORE. The performance of the regulators is directly dependent on the performance of the

bandgap. No external DC loading is allowed on VCORE, VCOREDIG, or VCOREREF. VCOREDIG is kept powered as long as there is a

valid supply and/or valid coin cell. Table 17 shows the main characteristics of the core circuitry.

Table 16. 16 MHz clock specifications

PF0100Z TA = -40 °C to 85 °C, PF0100AZ TA = -40 °C to 105 °C, VIN = 2.8 V to 4.5 V, LICELL = 1.8 V to 3.3 V and typical external

component values. Typical values are characterized at VIN = 3.6 V, LICELL = 3.0 V, and 25 °C, unless otherwise noted.

Symbol

Parameters

Min.

Typ.

Max.

Units

Notes

VIN16MHz

Operating voltage From VIN

2.8

–

4.5

f16MHZ

16 MHz clock frequency

14.7

17.2

MHz

f2MHZ

2.0 MHz clock frequency

1.84

–

2.15

MHz

(27)

Notes

27.

The 2.0 MHz clock is derived from the 16 MHz clock.

Table 17. Core voltages electrical specifications(29)

PF0100Z TA = -40 °C to 85 °C, PF0100AZ TA = -40 °C to 105 °C, VIN = 2.8 V to 4.5 V, LICELL = 1.8 V to 3.3 V, and typical external

component values. Typical values are characterized at VIN = 3.6 V, LICELL = 3.0 V, and 25 °C, unless otherwise noted.

Symbol

Parameters

Min.

Typ.

Max.

Units

Notes

VCOREDIG (digital core supply)

VCOREDIG

Output voltage

On mode (28)

Coin cell mode and off

–

1.5

1.3

–

VCORE (analog core supply)

VCORE

Output voltage

On mode and charging (28)

Off and Coin cell mode

–

2.775

0.0

–

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