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SCD1284 Datasheet(PDF) 58 Page - Intel Corporation |
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SCD1284 Datasheet(HTML) 58 Page - Intel Corporation |
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58 / 176 page ![]() CD1284 — IEEE 1284-Compatible Parallel Interface Controller 58 Datasheet 5.6.3 Out-of-Band Flow Control Flow control can also be accomplished through the modem handshake signal pairs RTS/CTS and DSR/DTR. These are called out-of-band because they are external to the data channel. The CD1284 can be programmed to automatically respond to and generate out-of-band flow control through these signals. 5.6.3.1 Receiver Out-of-Band Flow Control Along with the receiver FIFO threshold that sets the level where the CD1284 posts a service request, another threshold can be set to determine when it automatically asserts/deasserts DTR*. This is the DTR threshold and is enabled in the DTRth[3:0] bits (MCOR1[3:0]). The level can be set for any number of characters from 0 to 12. A threshold of zero disables the function and DTR* is not controlled by the device. If the function and the receiver are enabled, the CD1284 automatically asserts the DTR* output whenever the number of characters in the receive FIFO is less than the programmed number. Once the level reaches the threshold, DTR* is deasserted. DTR* is held in the deasserted state until the CPU removes enough characters from the FIFO to lower the level below the threshold. For the receiver to operate properly, the DTR threshold must be set to a value equal to, or higher than the receiver service-request threshold. If the levels were reversed, normal character reception could not be completed because DTR* would always be deasserted before the receive FIFO threshold is reached. The CPU would then not get a receive data service request until the receive FIFO timeout is reached. This would result in a serial data transmission performance limitation. The DTR* output can also be manually controlled through MSVR2[1]. Setting this bit to ‘1’ asserts the DTR* output. 5.6.3.2 Transmitter Out-of-Band Flow Control Transmitter out-of-band flow control is implemented with three modem control signals: the RTS* output and the CTS* and DSR* inputs. The RTS* output can be programmed to be automatically asserted whenever there is data in the transmit FIFO and the transmitter is cleared to send. CTS* and DSR* can be enabled to automatically control the transmitter. RTS Automatic Output is enabled in the RtsAO bit (COR2[2]). If RtsAO is set, the CD1284 automatically asserts the RTS* output when there is data in the FIFO to send. When the data is sent and the FIFO is empty, RTS* is deasserted until the CPU places more data in the FIFO. If RTSAO is not set and if required by the remote, the CPU must manually control the RTS* output through MSVR1[0]. Table 17. COR Control Bits Bit Name Register Function SCD12 COR3 Enables recognition of special characters 1 and 2 FCT COR3 Enables transparent flow control TxIBE COR2 Enables automatic transmitter in- band flow control IXM COR2 Enables implied XON mode |
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