NT5CC64M16GP-DINA datasheet(85/160 Pages) NANYA

85 / 160 page

Version 2.2

Nanya Technology Cooperation ©

04/2019

NTC Proprietary

Level: Property

DDR3(L) 1Gb SDRAM

NT5CB(C)128M8GN / NT5CB(C)64M16GP

ZQ Calibration Timing

Note:

CKE must be continuously registered high during the calibration procedure.

On-die termination must be disabled via the ODT signal or MRS during the calibration procedure.

All devices connected to the DQ bus should be high impedance during the calibration procedure.

ZQ External Resistor Value, Tolerance, and Capacitive loading

In order to use the ZQ calibration function, a 240 ohm +/- 1% tolerance external resistor connected between the ZQ pin and

ground. The single resistor can be used for each SDRAM or one resistor can be shared between two SDRAMs if the ZQ

calibration timings for each SDRAM do not overlap. The total capacitive loading on the ZQ pin must be limited.

Tc2

Ta1

Ta3

Tb0

Tb1

Tc1

Ta0

Ta2

Tc0

Address

CMD

ZQCL

NOP

Valid

ZQCS

NOP

Valid

ODT

tZQCS

Valid

A10

CKE

Valid

(1)

(2)

(1)

(2)

DQ Bus

Hi-Z

Activities

Hi-Z

Activities

tZQinit or tZQoper

(3)

Do not

care

Time

Break

NT5CC64M16GP-DINA Datasheet(PDF) 85 Page - Nanya Technology Corporation.

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