NT5CC64M16GP-DINA datasheet(50/160 Pages) NANYA

50 / 160 page

Version 2.2

Nanya Technology Cooperation ©

04/2019

NTC Proprietary

Level: Property

DDR3(L) 1Gb SDRAM

NT5CB(C)128M8GN / NT5CB(C)64M16GP

Read Timing; Clock to Data Strobe relationship

Clock to Data Strobe relationship is shown in the following figure and is applied when the DLL is enabled and locked.

Rising data strobe edge parameters:

• tDQSCK min/max describes the allowed range for a rising data strobe edge relative to CK and

.

• tDQSCK is the actual position of a rising strobe edge relative to CK and

.

• tQSH describes the data strobe high pulse width.

Falling data strobe edge parameters:

• tQSL describes the data strobe low pulse width.

Clock to Data Strobe Relationship

NOTES:

1. Within a burst, rising strobe edge is not necessarily fixed to be always at tDQSCK(min) or tDQSCK(max). Instead, rising strobe edge

can vary between tDQSCK(min) and tDQSCK(max).

2. The DQS,

 differential output high time is defined by tQSH and the DQS,  differential output low time is defined by tQSL.

3. Likewise, tLZ(DQS)min and tHZ(DQS)min are not tied to tDQSCKmin (early strobe case) and tLZ(DQS)max and tHZ(DQS)max are not

tied to tDQSCKmax (late strobe case).

4. The minimum pulse width of read preamble is defined by tRPRE(min).

5. The maximum read postamble is bound by tDQSCK(min) plus tQSH(min) on the left side and tHZDSQ(max) on the right side.

6. The minimum pulse width of read postamble is defined by tRPST(min).

7. The maximum read preamble is bound by tLZDQS(min) on the left side and tDQSCK(max) on the right side.

RL Measured

to this point

DQS, DQS

Early Strobe

DQS, DQS

Late Strobe

tLZ(DQS)min

tLZ(DQS)max

tRPRE

tDQSCKmin

tDQSCKmax

tQSH

tQSL

tRPST

tHZ(DQS)min

tHZ(DQS)max

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