VSC8504-02 datasheet(57/131 Pages) MICROSEMI

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Registers

VMDS-10507 VSC8504-02 Datasheet Revision 4.2

4.2.2

Mode Status

The register at address 1 in the device main registers space allows you to read the currently enabled

mode setting. The following table shows possible readouts of this register.

Unidirectional enable

R/W

When bit 0.12 = 1 or bit 0.8 = 0, this bit is

ignored. When bit 0.12 = 0 and bit 0.8 = 1, the

behavior is as follows:

1: Enable transmit from media independent

interface regardless of whether the PHY has

determined that a valid link has been

established.

0: Enable transmit from media independent

interface only when the PHY has determined

that a valid link has been established.

Note: This bit is only applicable in

100BASE-FX and 1000BASE-X

fiber media modes.

4:0 Reserved

Reserved.

00000

Before selecting the 1000 Mbps forced speed mode, manually configure the PHY as master or slave by

setting bit 11 in register 9 (1000BASE-T Control). Each time the link drops, the PHY needs to be powered

down manually to enable it to link up again using the master/slave setting specified in register 9.11.

Table 19 •

Mode Status, Address 1 (0x01)

Bit Name

Access Description

Default

100BASE-T4 capability

1: 100BASE-T4 capable.

100BASE-TX FDX capability RO

1: 100BASE-TX FDX capable.

100BASE-TX HDX capability RO

1: 100BASE-TX HDX capable.

10BASE-T FDX capability

1: 10BASE-T FDX capable.

10BASE-T HDX capability

1: 10BASE-T HDX capable.

100BASE-T2 FDX capability RO

1: 100BASE-T2 FDX capable.

100BASE-T2 HDX capability RO

1: 100BASE-T2 HDX capable.

Extended status enable

1: Extended status information present in

Unidirectional ability

1: PHY able to transmit from media

independent interface regardless of

whether the PHY has determined that a

valid link has been established.

0: PHY able to transmit from media

independent interface only when the PHY

has determined that a valid link has been

established.

Note: This bit is only applicable to

100BASE-FX and

1000BASE-X fiber media

modes.

Preamble suppression

capability

1: MF preamble can be suppressed.

0: MF required.

Table 18 •

Mode Control, Address 0 (0x00) (continued)

Bit Name

Access Description

Default

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