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TNETV2501INPGF Datasheet(PDF) 42 Page - Texas Instruments |
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TNETV2501INPGF Datasheet(HTML) 42 Page - Texas Instruments |
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42 / 197 page  Functional Overview 42 December 2002 − Revised November 2008 SPRS206K 3.1.5 Boot Configuration The on-chip bootloader provides a way to transfer application code and tables from an external source to the on-chip RAM at power up. The 5501 provides several options to download the code to accommodate varying system requirements. These options include: • Host-port interface (HPI) boot in multiplexed mode • External memory boot (via EMIF) from 16-bit asynchronous memory • Serial port boot (from McBSP0) with 16-bit element length • SPI EPROM boot (from McBSP0) supporting EPROMs with 24-bit addresses • I2C EPROM boot (from I2C) supporting EPROMs larger than 512K bits • UART boot • Direct execution (no boot) from 16-bit or 32-bit external asynchronous memory The external pins BOOTM2, BOOTM1, and BOOTM0 select the boot configuration. The values of BOOTM[2:0] are latched with the rising edge of the RESET input. BOOTM2 is shared with GPIO2, BOOTM1 is shared with GPIO1, and BOOTM0 is shared with GPIO0. The boot configurations available are summarized in Table 3−3. Table 3−3. Boot Configuration Selection Via the BOOTM[2:0] Pins BOOTM[2:0] BOOT PROCESS 000 Direct execution from 16-bit external asynchronous memory 001 SPI EPROM boot 010 Serial port boot (from McBSP0) 011 External memory boot (via EMIF) from 16-bit asynchronous memory 100 Direct execution from 32-bit external asynchronous memory 101 HPI boot 110 I2C EPROM boot 111 UART boot 3.2 Peripherals The 5501 includes the following on-chip peripherals: • An external memory interface (EMIF)† supporting a 32-bit interface to asynchronous memory, SDRAM, and SBSRAM • An 8-bit host-port interface (HPI)† • A six-channel direct memory access (DMA) controller • Two multichannel buffered serial ports (McBSPs) • A programmable analog phase-locked loop (APLL) clock generator • General-purpose I/O (GPIO) pins and a dedicated output pin (XF) † The 5501 can be configured as follows: • EMIF/HPI mode: 32-bit external memory interface with 8-bit host-port interface • PGPIO mode: PGPIO support with no external memory interface and no host-port interface |
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