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ADC3541 Datasheet(PDF) 37 Page - Texas Instruments

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Part # ADC3541
Description  ADC354x 14-bit, 10-MSPS to 65-MSPS, Low-noise, Ultra-low Power ADC
PDF  68 Pages
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

ADC3541 Datasheet(HTML) 37 Page - Texas Instruments

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7.3.5.3 Output Data Format
The output data can be configured to two's complement (default) or offset binary formatting using SPI register
writes (register 0x8F and 0x92). Table 7-8 provides an overview for minimum and maximum output codes for the
two formatting options. The actual output resolution is set by the output bit mapper.
Table 7-8. Overview of minimum and maximum output codes vs resolution for different formatting
Two's Complement (default)
Offset Binary
RESOLUTION (BIT)
14
16
18
20
14
16
18
20
VIN,MAX
0x1FFF
0x7FFF
0x1FFFF
0x7FFFF
0x3FFF
0xFFFF
0x3FFFF
0xFFFFF
0
0x0000
0x00000
0x2000
0x8000
0x20000
0x80000
VIN,MIN
0x2000
0x8000
0x20000
0x80000
0x0000
0x00000
7.3.5.4 Output Formatter
The digital output interface utilizes a flexible output bit mapper Figure 7-37. The bit mapper takes the 14-bit
output directly from the ADC or from digital filter block and reformats it to a resolution of 14, 16, 18 or 20-bit. With
parallel output format the maximum output resolution supported is 16-bit. With serial CMOS output the output
serialization factor gets adjusted accordingly for 2- and 1-wire interface mode. The maximum output data rate
can not be exceeded independently of output resolution and serialization factor.
N
NCO
14-Bit
Output
14-Bit ADC
CMOS
Interface
Output Bit
Mapping
14 Bit
16 Bit
18 Bit
20 Bit
Figure 7-37. Interface output bit mapper
Table 7-9 provides an overview for the resulting serialization factor depending on output resolution and output
modes. Note that the DCLKIN frequency needs to be adjusted accordingly as well. Changing the output
resolution to 16-bit, 2-wire mode for example would result in DCLKIN = FS * 4 instead of * 3.5.
The output bit mapper can be used for bypass and decimation filter.
Table 7-9. Serialization factor vs output resolution for different output modes
OUTPUT
RESOLUTION
Interface
SERIALIZATION
FCLK
DCLKIN
DCLK
D0/D1
14-bit (default)
2-Wire
7x
FS/2
FS* 3.5
FS* 3.5
FS* 7
1-Wire
14x
FS
FS* 7
FS* 7
FS* 14
16-bit
2-Wire
8x
FS/2
FS* 4
FS* 4
FS* 8
1-Wire
16x
FS
FS* 8
FS* 8
FS* 16
18-bit
2-Wire
9x
FS/2
FS* 4.5
FS* 4.5
FS* 9
1-Wire
18x
FS
FS* 9
FS* 9
FS* 18
20-bit
2-Wire
10x
FS/2
FS* 5
FS* 5
FS* 10
1-Wire
20x
FS
FS* 10
FS* 10
FS* 20
The programming sequence to change the output interface and/or resolution from default settings is shown in
Section 7.3.5.5.
www.ti.com
ADC3541
SBAS840 – JULY 2020
Copyright © 2020 Texas Instruments Incorporated
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