TPS7A20

GND

OUTPUT

1.0 µF

INPUT

ENABLE

GND

SVA-30180501

1.0 µF

17

TPS7A20

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SBVS338A – MARCH 2020 – REVISED MARCH 2020

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8.2 Typical Application

Figure 7 shows the typical application circuit for the TPS7A20. Input and output capacitances may need to be

increased above the 1 µF minimum for some applications.

Figure 7. TPS7A20 Typical Application

8.2.1 Design Requirements

Table 2 summaries the design requirements for Figure 7.

Table 2. Design Parameters

DESIGN PARAMETER

EXAMPLE VALUE

Input voltage range

3.1 V to 6.0 V

Output voltage

2.8 V

Output current

200 mA

Output capacitor range

0.7 µF to 10 µF

Output capacitor ESR range

5 mΩ to 80 mΩ

8.2.2 Detailed Design Procedure

The TPS7A20 is designed to meet the requirements of RF and analog circuits, by providing low noise, high

PSRR, low quiescent current, and low line or load transient response figures. The device offers excellent noise

performance without the need for a noise bypass capacitor and is stable with input and output capacitors with a

value of 1 µF. The TPS7A20 delivers this performance in industry standard packages such as DSBGA, X2SON,

9 Power Supply Recommendations

This device is designed to operate from an input supply voltage range of 1.6 V to 6.0 V. The input supply must

be well regulated and free of spurious noise. To ensure that the output voltage is well regulated and dynamic

highly recommends using a 1-µF or greater input capacitor to reduce the impedance of the input supply,

especially during transients.