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UPD78044F Datasheet(PDF) 53 Page - NEC |
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UPD78044F Datasheet(HTML) 53 Page - NEC |
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53 / 90 page ![]() µPD78F0034B, 78F0034BY, 78F0034B(A), 78F0034BY(A) 53 Data Sheet U16369EJ1V0DS AC Characteristics (1) Basic Operation (TA = –40 to +85 °C, VDD = 1.8 to 5.5 V) 4.0 V ≤ VDD ≤ 5.5 V 2.7 V ≤ VDD < 4.0 V Parameter Symbol Conditions MIN. TYP. MAX. Unit Cycle time TCY Operating with 0.238 16 µs (Min. instruction main system clock 0.4 16 µs execution time) 1.6 16 µs Operating with subsystem clock 103.9Note 1 122 125 µs TI00, TI01 input tTIH0, tTIL0 4.0 V ≤ VDD ≤ 5.5 V 2/fsam+0.1Note 2 µs high-/low-level 2.7 V ≤ VDD < 4.0 V 2/fsam+0.2Note 2 µs width 1.8 V ≤ VDD < 2.7 V 2/fsam+0.5Note 2 µs TI50, TI51 input fTI5 2.7 V ≤ VDD ≤ 5.5 V 0 4 MHz frequency 1.8 V ≤ VDD < 2.7 V 0 275 kHz TI50, TI51 input tTIH5, tTIL5 2.7 V ≤ VDD ≤ 5.5 V 100 ns high-/low-level 1.8 V ≤ VDD < 2.7 V 1.8 ns width Interrupt request tINTH, tINTL INTP0 to INTP3, 2.7 V ≤ VDD ≤ 5.5 V 1 µs input high-/low- P40 to P47 1.8 V ≤ VDD < 2.7 V 2 µs level width RESET tRSL 2.7 V ≤ VDD ≤ 5.5 V 10 µs low-level width 1.8 V ≤ VDD < 2.7 V 20 µs Notes 1. Value when the external clock is used. When a crystal resonator is used, it is 114 µs (MIN.). 2. Selection of fsam = fX, fX/4, fX/64 is possible using bits 0 and 1 (PRM00, PRM01) of prescaler mode register 0 (PRM0). However, if the TI00 valid edge is selected as the count clock, the value becomes fsam = fX/8. 1.8 V ≤ VDD < 2.7 V |
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