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VSC8221 Datasheet(PDF) 96 Page - Microsemi Corporation |
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VSC8221 Datasheet(HTML) 96 Page - Microsemi Corporation |
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96 / 138 page ![]() VSC8221 Data Sheet VMDS-10106 Revision 4.1 December 2006 96 of 106 106 23.2.30 Register 29 (1Dh) – Reserved 29.15:0 - Reserved 23.2.31 Register 30 (1Eh) - MAC interface Clause 37 Auto-Negotiation Control and Status 30.15 – Reserved 30.14 - Clause 37 Auto-Negotiation Disable When bit 30.14 is set to a “1”, the clause 37 auto-negotiation state machine is disabled in the VSC8221. Bit 30.14 is cleared by default. Register 29 (1Dh) – Reserved Bit Name Access States Reset Value Sticky 15:0 Reserved RO 00000000 00000000 Register 30 (1Eh) – MAC interface Clause 37 Auto-Negotiation Control and Status Bit Name Access States Reset Value Sticky 15 Reserved RO 0 14 Clause 37 Auto-Negotiation Disable R/W 1 = Disable clause 37 auto-negotiation 0 = Enable clause 37 auto-negotiation 0 S 13:12 MAC Remote Fault RO Correspond to remote fault bits sent by MAC during clause 37 auto-negotiation 00 11 MAC Asymmetric Pause RO Corresponds to Asymmetric Pause bit sent by MAC during clause 37 auto-negotiation 0 10 MAC Symmetric Pause RO Corresponds to Symmetric Pause bit sent by MAC during clause 37 auto-negotiation 0 9 Clause 37 Restart Auto-Negotiaton R/W SC 1 = initiate restart of clause 37 auto-negotiation 0 = Normal operation 0 8 MAC Full Duplex RO Corresponds to Full Duplex Ability bit sent by MAC during clause 37 auto-negotiation 0 7 MAC Half Duplex RO Corresponds to Half Duplex Ability bit sent by MAC during clause 37 auto-negotiation 0 6 Reserved RO 0 5 Clause 37 Auto-Negotiation Com- plete RO 1 = Clause 37 auto-negotiation has completed successfully 0 = Clause 37 auto-negotiation has not completed 0 4 Reserved RO 0 3 Link interlock Fail RO 1 = Clause 37/28 auto-negotiation interlock could not complete 0 2 Link interlock Complete RO 1 = Clause 37/28 auto-negotiation interlock com- pleted 0 1:0 RXLOS Pulse Delay1 1 in SGMii to CAT-5, Modified Clause 37 Auto-negotiation-Enabled PHY Operating modes, the RXLOS signal is always driven, regardless of the settings of Mii Register 30.1:0. For more information about PHY operating modes, see Table 33, “PHY Operating Modes,” on page 86. R/W 00 = 0ms (always stays low) 01 = 20ms 10 = 200ms 11 = 500ms 01 |
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