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VT8601 Datasheet(PDF) 55 Page - List of Unclassifed Manufacturers

Part # VT8601
Description  Single-Chip Slot-1 / Socket-370 PCI North Bridge With Integrated AGP 2D / 3D Graphics Accelerator and Advanced Memory Controller
PDF  144 Pages
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Manufacturer  ETC1 [List of Unclassifed Manufacturers]
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VT8601 Datasheet(HTML) 55 Page - List of Unclassifed Manufacturers

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VT8601 Apollo ProMedia
Revision 1.3 September 8, 1999
-49-
Device 0 Bus 0 Host Bridge Registers
7HFKQRORJLHV ,QF
:H&
:H&RRQQHFW
QQHFW
Device 0 Offset 83-80 - GART/TLB Control...................RW
31-16 Reserved
........................................ always reads 0
15-8 Reserved (test mode status)................................. RO
7
Flush Page TLB
0
Disable ...................................................default
1Enable
6-4
Reserved (always program to 0) ........................ RW
3
PCI Master Address Translation for GA Access
0
Addresses generated by PCI Master accesses
of the Graphics Aperture will not be translateddefault
1
PCI Master GA addresses will be translated
2
AGP Master Address Translation for GA Access
0
Addresses generated by AGP Master accesses
of the Graphics Aperture will not be translateddefault
1
AGP Master GA addresses will be translated
1
CPU Address Translation for GA Access
0
Addresses generated by CPU accesses of the
Graphics Aperture will not be translated ..... def
1
CPU GA addresses will be translated
0
AGP Address Translation for GA Access
0
Addresses generated by AGP accesses of the
Graphics Aperture will not be translated ..... def
1
AGP GA addresses will be translated
Note: For any master access to the Graphics Aperture range,
snoop will not be performed.
Device 0 Offset 84 - Graphics Aperture Size .................. RW
7-0
Graphics Aperture Size
11111111 1M
11111110 2M
11111100 4M
11111000 8M
11110000 16M
11100000 32M
11000000 64M
10000000 128M
00000000 256M
Offset 8B-88 - GA Translation Table Base ..................... RW
31-12 Graphics Aperture Translation Table Base
Pointer to the base of the translation table in system
memory used to map addresses in the aperture range
(the pointer to the base of the "Directory" table).
11-3 Reserved
........................................ always reads 0
2
One Cycle TLB Flush Command
0
Disable................................................... default
1
Enable ................................... should be set to 1
1
Graphics Aperture Enable
0
Disable................................................... default
1
Enable Graphics Aperture Address [31:28]
Note: To disable the Graphics Aperture, set this bit
to 0 and set all bits of the Graphics Aperture Size to
0. To enable the Graphics Aperture, set this bit to 1
and program the Graphics Aperture Size to the
desired aperture size.
0
Reserved
........................................ always reads 0
Note: If TLB miss, the TLB table is fetched by the address:
Gr Ap Trans Table Base [31:12] + A[27:22], A[21:12], 2’b00



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