AD5413 datasheet(11/49 Pages) AD

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Data Sheet

AD5413

Rev. 0 | Page 11 of 49

ABSOLUTE MAXIMUM RATINGS

TA = 25°C, unless otherwise noted. Transient currents of up to

±150 mA do not cause silicon controlled rectifier (SCR) latch-up.

Table 4.

Parameter

Rating

AVDD1 to AGND, DGND

−0.3 V to +45 V

AVSS to AGND, DGND

−45 V to +0.3 V

AVDD1 to AVSS

−0.3 V to +55 V

AVDD2 to AGND, DGND

−0.3 V to +45 V

AVDD2 to AVSS

−0.3 V to +55 V

VLOGIC to DGND

−0.3 V to +6 V

Digital Inputs1 to DGND

−0.3 V to VLOGIC + 0.3 V or +6 V

(whichever voltage is less)

Digital Outputs2 to DGND

−0.3 V to VLOGIC + 0.3 V or +6 V

(whichever voltage is less)

REFIN, REFOUT, VLDO, CHART to AGND

−0.3 V to AVDD2 + 0.3 V or +6 V

(whichever voltage is less)

RA to AGND

−0.3 V to +4.5 V

RB to AGND

−0.3 V to +4.5 V

VIOUT to AGND

AVSS − 0.3 V or −45 V

(whichever voltage is greater)

to AVDD1 + 0.3 V or +45 V

(whichever voltage is less)

+VSENSE to AGND

±40 V

−VSENSE to AGND

±40 V

CCOMP to AGND

AVSS − 0.3 V to AVDD1 + 0.3 V

AGND, DGND to REFGND

−0.3 V to +0.3 V

Industrial TA3

−40°C to +105°C

Storage Temperature Range

−65°C to +150°C

TJ Maximum

125°C

Power Dissipation

(TJ maximum − TA)/θJA

Lead Temperature

JEDEC industry standard

Soldering

J-STD-020

1 The digital inputs are SCLK, SDI, SYNC, AD0, AD1, RESET, and LDAC.

2 The digital outputs are FAULT and SDO.

3 Power dissipated on the chip must be derated to keep the junction

temperature below 125°C.

Stresses at or above those listed under Absolute Maximum Ratings

may cause permanent damage to the product. This is a stress rating

only; functional operation of the product at these or any other

conditions above those indicated in the operational section of this

specification is not implied. Operation beyond the maximum

operating conditions for extended periods may affect product

reliability.

THERMAL RESISTANCE

Thermal performance is directly linked to printed circuit board

(PCB) design and operating environment. Close attention to

PCB thermal design is required. θJA is the junction to ambient

thermal resistance, and ΨJT is the junction to top of package

thermal resistance.

Table 5. Thermal Resistance

Package Type

θJA

ΨJT

Unit

CP-32-121

41.43

0.29

°C/W

1 Thermal impedance simulated values are based on a JEDEC 2S2P thermal

test board with thermal vias. See JEDEC JESD-51.

ELECTROSTATIC DISCHARGE (ESD) RATINGS

The following ESD information is provided for handling of

ESD-sensitive devices in an ESD protected area only.

Human body model (HBM) per ANSI/ESDA/JEDEC JS-001.

Charged device model (FICDM) per ANSI/ESDA/JEDEC JS-002.

Machine model (MM) per ANSI/ESD STM5.2. MM voltage

values are for characterization only.

ESD Ratings for AD5413

Table 6. AD5413, 32-Lead LFCSP

ESD Model

Withstand Threshold (V)

Class

HBM

±3000

FICDM

±750

±200

ESD CAUTION

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