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FS32K148HEX0MLFT Datasheet(PDF) 31 Page - NXP Semiconductors |
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FS32K148HEX0MLFT Datasheet(HTML) 31 Page - NXP Semiconductors |
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31 / 101 page ![]() 5.4 DC electrical specifications at 5.0 V Range Table 19. DC electrical specifications at 5.0 V Range for S32K1xx series Symbol Parameter Value Unit Notes Min. Typ. Max. VDD I/O Supply Voltage 4 — 5.5 V Vih Input Buffer High Voltage 0.65 x VDD — VDD + 0.3 V 1 Vil Input Buffer Low Voltage VSS − 0.3 — 0.35 x VDD V 2 Vhys Input Buffer Hysteresis 0.06 x VDD — — V IohGPIO IohGPIO-HD_DSE_0 I/O current source capability measured when pad Voh= (VDD - 0.8 V) 5 — — mA IolGPIO IolGPIO-HD_DSE_0 I/O current sink capability measured when pad Vol= 0.8 V 5 — — mA IohGPIO-HD_DSE_1 I/O current source capability measured when pad Voh = VDD - 0.8 V 20 — — mA 3 IolGPIO-HD_DSE_1 I/O current sink capability measured when pad Vol = 0.8 V 20 — — mA 3 IohGPIO-FAST_DSE_0 I/O current sink capability measured when pad Voh = VDD - 0.8 V 14.0 — — mA 4 IolGPIO-FAST_DSE_0 I/O current sink capability measured when pad Vol= 0.8 V 14.5 — — mA 4 IohGPIO-FAST_DSE_1 I/O current sink capability measured when pad Voh = VDD - 0.8 V 21 — — mA 4 IolGPIO-FAST_DSE_1 I/O current sink capability measured when pad Vol= 0.8 V 20.5 — — mA 4 IOHT Output high current total for all ports — — 100 mA IIN Input leakage current (per pin) for full temperature range at VDD = 3.3 V 5 5005 nA 6 All pins other than high drive port pins 0.005 0.5 μA High drive port pins (excluding XTAL pin) 0.010 0.5 μA RPU Internal pullup resistors 20 50 kΩ 7 RPD Internal pulldown resistors 20 50 kΩ 8 1. For reset pads, same Vih levels are applicable 2. For reset pads, same Vil levels are applicable 3. The strong pad I/O pin is capable of switching a 50 pF load up to 40 MHz. 4. For refernce only. Run simulations with the IBIS model and custom board for accurate results. 5. Typical leakage is given at room temperature. Maximum is given for 125°C. Leakage numbers increase with temperature, approximately every 12 – 14°C the value doubles. Leakage is tested at hot temperature. We ensure maximums are not exceeded. Please note that when the ADC module samples a pin, additional currents beyond the leakage number are drawn to charge the sample and hold capacitances and internal analog busses. These are difficult to predict 6. Several I/O have both high drive and normal drive capability selected by the associated Portx_PCRn[DSE] control bit. All other GPIOs are normal drive only. For details see IO Signal Description Input Multiplexing sheet(s) attached with the Reference Manual. I/O parameters S32K1xx Data Sheet, Rev. 14, 08/2021 NXP Semiconductors 31 |
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