L9374LF datasheet(15/80 Pages) STMICROELECTRONICS

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L9374LF

Electrical specifications

The slope is defined between 20 % and 80 % of the edge.

Symmetric switching of DMOS

Figure 6. Symmetric switching of DMOS diagram

A Symmetric switching is present to ensure a reliable PWM at the output.

3.3.5

PWM output behavior

(refer to Section 4.4: Set-point controller for details)

Table 9. Output timing electrical characteristics(1)

Symbol

Parameter

Condition

Min.

Typ.

Max.

Unit

Vedge

Edge shaping threshold

measured from VD

-2.2

-1

Sf_Q1/Q2

Sf output on/off slope fast Q1/Q2

VD = 20 V

Iload=1.5 A

resistive load

310

V/μs

Ss_Q1/Q2 Ss output on/off slope slow Q1/Q2

246

V/μs

Sf_Q3/Q4

Sf output on/off slope fast Q3/Q4

613

V/μs

Ss_Q3/Q4 Ss output on/off slope slow Q3/Q4

2.5

7.5

V/μs

1. See Figure 5 for waveform.

Table 10. Symmetric switching of DMOS electrical characteristics

Symbol

Parameter

Condition

Min.

Typ.

Max.

Unit

tsym1

Symmetry II

with edge shaping

tx-dc · T< 1.5 μs

dc = 50 %

VQ = 10 V

-1.0

2.0

μs

tsym2

Symmetry II

without edge shaping

3.0

μs

Table 11. PWM output behavior characteristics

Symbol

Parameter

Condition

Min.

Typ.

Max.

Unit

f_Qx

Output frequency

-2 %

+2 %

kHz

Duty range

100

DCRES

Duty resolution of f_A

0.2

NRES

Number of bits for duty resolution/

target current value

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