L9966 datasheet(121/122 Pages) STMICROELECTRONICS

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List of figures

Figure 1.

Block diagram .................................................................... 2

Figure 2.

Pin connection diagram .............................................................. 3

Figure 3.

Application circuit .................................................................. 6

Figure 4.

2s2p PCB with thermal vias .......................................................... 11

Figure 5.

Operating mode state diagram ........................................................ 12

Figure 6.

Example of power up sequence ....................................................... 14

Figure 7.

Example of power down sequence ..................................................... 15

Figure 8.

WAKE SOURCE returns at its PRE_SLEEP value........................................... 18

Figure 9.

WAKE SOURCE determines a WAKE EVENT ............................................. 18

Figure 10.

Combination of two consecutive WAKE SOURCES determines a WAKE EVENT ..................... 19

Figure 11.

SLEEP-POLLING operation example ................................................... 19

Figure 12.

Dewetting activation ............................................................... 21

Figure 13.

IOx configuration diagram ........................................................... 26

Figure 14.

IOx configuration: IO1 driven through IO3 (stuck @ GND), Pull Up to VPRE, 5 mA, MODE=1............. 28

Figure 15.

Lambda IO stage configuration in LSF mode .............................................. 29

Figure 16.

Active discharge function ............................................................ 30

Figure 17.

Simplified circuit for resistance measurement .............................................. 36

Figure 18.

ADC conversion chain .............................................................. 39

Figure 19.

SEQUENCER flow example .......................................................... 41

Figure 20.

SYNC controlled sequencer example ................................................... 43

Figure 21.

Example of sequencer priority case ..................................................... 44

Figure 22.

Example of sequencer priority case ..................................................... 44

Figure 23.

Example of sequencer priority case ..................................................... 45

Figure 24.

Interrupt condition open/closed loop INT generation ......................................... 45

Figure 25.

SENT input structure ............................................................... 47

Figure 26.

Write access (32 bits frame) .......................................................... 52

Figure 27.

Read access (32 bits frame).......................................................... 52

Figure 28.

Write burst mode frames ............................................................ 55

Figure 29.

Read burst mode frames ............................................................ 55

Figure 30.

Burst mode error handling ........................................................... 56

Figure 31.

SPI timing ...................................................................... 57

Figure 32.

VRS interface block diagram ......................................................... 62

Figure 33.

VRS block diagram - Normal operating mode .............................................. 64

Figure 34.

Hysteresis application .............................................................. 64

Figure 35.

VRS_A fully adaptive hysteresis ....................................................... 67

Figure 36.

VRS_FE_FILT_EN = 1.............................................................. 68

Figure 37.

VRS_FE_FILT_EN = 0.............................................................. 68

Figure 38.

VRS block diagram - Diagnostic operating mode - Current path ................................. 70

Figure 39.

Sensor sketch ................................................................... 70

Figure 40.

Variable reluctance sensor (VRS) ...................................................... 71

Figure 41.

Hall effect sensor configuration 1 ...................................................... 72

Figure 42.

Hall effect sensor configuration 2 ...................................................... 72

Figure 43.

TQFP48 (7x7x1 mm exp. pad down 5.0x5.0) package outline ...................................111

L9966

List of figures

DS12459 - Rev 10

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