STM32W108HB datasheet(127/278 Pages) STMICROELECTRONICS

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STM32W108HB STM32W108CC STM32W108CB STM32W108CZ

Serial interfaces

Doc ID 16252 Rev 14

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Bit 8 NACKIE: I2C not acknowledge received interrupt enable

This bit is set and cleared by software.

0: Interrupt is inhibited

1: An I2C not acknowledge interrupt is generated whenever NACK=1 in the SCx_I2CSR

Bit 7 CMDFINIE: I2C command complete detection interrupt enable

This bit is set and cleared by software.

0: Interrupt is inhibited

1: An I2C command complete interrupt is generated whenever CMDFIN=1 in the SCx_I2CSR

Bit 6 BTFIE: I2C byte transmit finished interrupt enable

This bit is set and cleared by software.

0: Interrupt is inhibited

1: An I2C byte transmit complete interrupt is generated whenever BTF=1 in the SCx_I2CSR

Bit 5 BRFIE: I2C byte receive finished interrupt enable

This bit is set and cleared by software.

0: Interrupt is inhibited

1: An I2C byte receive complete interrupt is generated whenever BRF=1 in the SCx_I2CSR

Bit 4 UDRIE: Underrun interrupt enable

This bit is set and cleared by software.

0: Interrupt is inhibited

1: An underrun interrupt is generated whenever UND=1 in the SCx_ISR register

Bit 3 OVRIE: Overrun interrupt enable

This bit is set and cleared by software.

0: Interrupt is inhibited

1: An overrun interrupt is generated whenever OVR=1 in the SCx_SPISR register or OVR=1

in the SCx_UARTSR register or OVRA/OVRB in the SCx_DMASR register.

Bit 2 IDLEIE: Line detected interrupt enable

This bit is set and cleared by software.

0: Interrupt is inhibited

1: An idel line detect interrupt is generated whenever IDLE=1 in the SCx_SPISR register or

IDLE=1 in the SCx_UARTSR register.

Bit 1 TXEIE: Transmit data register empty interrupt enable

This bit is set and cleared by software.

0: Interrupt is inhibited

1: A transmit data register empty interrupt is generated whenever TXE=1 in the SCx_SPISR

Bit 0 RXNEIE: Data register not empty interrupt enable

This bit is set and cleared by software.

0: Interrupt is inhibited

1: A data register not empty interrupt is generated whenever RXNE=1 in the SCx_SPISR

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