STM32W108HB datasheet(133/278 Pages) STMICROELECTRONICS

Part #	STM32W108HB

Description	High-performance, IEEE 802.15.4 wireless system-on-chip with up to 256 Kbytes of embedded Flash memory

PDF	278 Pages

Scroll/Zoom	100%

Manufacturer	STMICROELECTRONICS [STMicroelectronics]

Direct Link	http://www.st.com

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133 / 278 page

STM32W108HB STM32W108CC STM32W108CB STM32W108CZ

Serial interfaces

Doc ID 16252 Rev 14

133/278

9.10

Serial controller: Inter-integrated circuit (I2C) registers

9.10.1

Serial controller I2C status register (SCx_I2CSR)

Address offset: 0xC844 (SC1_I2CSR) and 0xC044 (SC2_I2CSR)

Reset value:

0x0000 0000

Reserved, must be kept at reset value

CMDFIN: Command finished flag

BRF: Byte receive finished flag

BTF: Byte transfer finished flag

NACK: Not acknowledge flag

Reserved

CMD

FIN

BRF

BTF

NACK

Bits [31:4]

Bit 3

This bit is set when a START or STOP command completes. It is cleared on the next I2C bus

activity.

0: START/ STOP command transmission not done

1: START/ STOP command transmission succeeded

Bit 2

This bit is set when a byte is received. It clears on the next I2C bus activity.

0: Data byte reception not done

1: Data byte reception succeeded

Bit 1

This bit is set when a byte is transmitted. It clears on the next I2C bus activity.

0: Data byte transmission not done

1: Data byte transmission succeeded

Bit 0

This bit is set when a NACK is received from the slave. It clears on the next I2C bus activity.

0: No NACK received

1: NACK receive succeeded

STM32W108HB Datasheet(PDF) 133 Page - STMicroelectronics