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STM32W108HB Datasheet(PDF) 230 Page - STMicroelectronics

Part # STM32W108HB
Description  High-performance, IEEE 802.15.4 wireless system-on-chip with up to 256 Kbytes of embedded Flash memory
PDF  278 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM32W108HB Datasheet(HTML) 230 Page - STMicroelectronics

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Analog-to-digital converter
STM32W108HB STM32W108CC STM32W108CB STM32W108CZ
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Doc ID 16252 Rev 14
11.3.6
ADC DMA control register (ADC_DMACR)
Address offset: 0xD010
Reset value:
0x0000 0000
Reserved, must be kept at reset value
RST:
Reserved, must be kept at reset value
AUTOWRAP: Selects DMA mode
LOAD: Loads the DMA buffer
11.3.7
ADC DMA status register (ADC_DMASR)
Address offset: 0xD014
Reset value:
0x0000 0000
Reserved, must be kept at reset value
OVF: DMA overflow
ACT: DMA status
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
Reserved
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Reserved
RST
Reserved
AUTO
WRAP
LOAD
wrw
rw
Bits [31:5]
Bit 4
Write 1 to reset the ADC DMA. This bit auto-clears.
Bits [3:2]
Bit 1
0: Linear mode, the DMA stops when the buffer is full.
1: Auto-wrap mode, the DMA output wraps back to the start when the buffer is full.
Bit 0
Write 1 to start DMA (writing 0 has no effect). Cleared when DMA starts or is reset.
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
Reserved
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Reserved
OVF
ACT
rr
Bits [31:2]
Bit 1
Occurs when an ADC result is ready and the DMA is not active. Cleared by DMA reset.
Bit 0
Reads 1 if DMA is active.



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