M5M29KB datasheet(7/32 Pages) RENESAS

7 / 32 page

M5M29KB/T331AVP

Renesas LSIs

Rev.1.0_48a_bezz

33,554,432-BIT (4,194,304-WORD BY 8-BIT /2,097,152-WORD BY 16-BIT)

CMOS 3.3V-ONLY, BLOCK ERASE FLASH MEMORY

Loaded data to the page buffer is cleared by writing the

Clear Page Buffer command of 55H followed by the

Confirm command of D0H. This command is valid for

clearing data loaded by Single Data Load to Page Buffer

command.

Writing the Suspend command of B0H during block erase

operation interrupts the block erase operation and allows

read out from another block of memory. Writing the

Suspend command of B0H during program operation

interrupts the program operation and allows read out from

another block of memory. The Bank address is required

when writing the Suspend/Resume Command. The device

continues to output Status Register data when read, after

the Suspend command is written to it. Polling the WSM

Status and Suspend Status bits will determine when the

erase operation or program operation has been suspended.

At this point, writing of the Read Array command to the CUI

enables reading data from blocks other than that which is

suspended. When the Resume command of D0H is written

to the CUI, the WSM will continue with the erase or

program processes.

The 32M-bit DINOR IV Flash Memory has a master Write

Protect pin (WP#). When WP# is at VIH, all blocks can be

programmed or erased. When WP# is low, all blocks are in

locked mode which prevents any modifications to memory

blocks. Software Lock Release function is only command

which allows to program or erase.

When the power supply voltage is less than VLKO, Low

VCC Lock-Out voltage, the device is set to the Read-only

mode.

A delay time of 2µs is required before any device

operation is initiated. The delay time is measured from the

time Flash VCC reaches Flash VCCmin (3.0V).

During power up, RP# = GND is recommended. Falling in

Busy

status

not

recommended

for

possibility

damaging the device.

Array data load to the page buffer is performed by

writing the Flash to Page Buffer command of F1H

followed by the Confirm command of D0H. An address

within the page to be loaded is required. Then the array

data can be copied into the other pages within the same

bank by using the Page Buffer to Flash command.

Flash to Page Buffer Command (F1H/D0H)

The 32M-bit DINOR IV Flash Memory is constructed by 2

boot blocks of 4K words/ 8K bytes, 6 parameter blocks of

4K words/ 8K bytes and 7 main blocks of 32K words/ 64K

bytes in Bank(I), by 8 main blocks of 32K words/ 64K bytes

in Bank(II) and by 24 main blocks of 32K words/ 64K bytes

in Bank(III) and Bank(IV).

Power Supply Voltage

Clear Page Buffer Command (55H/D0H)

Data Protection

Suspend/Resume Command (B0H/D0H)

Memory Organization

The command sequence enable us to erase all blocks.

The command can be used by writing Setup command

A7H(1st cycle) and confirm command D0H(2nd cycle). The

sequence is not valid in case of WP#=VIL.

Erase All Unlocked Blocks Command (A7H/D0H)

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