M5M29KB/T331AVP

Renesas LSIs

Rev.1.0_48a_bezz

16

33,554,432-BIT (4,194,304-WORD BY 8-BIT /2,097,152-WORD BY 16-BIT)

CMOS 3.3V-ONLY, BLOCK ERASE FLASH MEMORY

Read / Write Mode (CE# control)

AC electrical characteristics

(Ta=-40 ~85

°C and Flash VCC=3.0V~3.6V, unless otherwise noted)

Read / Write Mode (WE# control)

-Read timing parameters during command write operations mode are the same as during read only operation mode.

-Typical values at Flash VCC=3.3V and Ta=25

Min.

Typ.

Max.

tWC

tAVAV

Write Cycle Time

70

ns

tAS

tAVWH

Address Setup Time

35

ns

tAH

tWHAX

Address Hold Time

0

ns

tDS

tDVWH

Data Setup Time

35

ns

tDH

tWHDX

Data Hold Time

0

ns

tOEH

tWHGL

OE# Hold from WE# High

10

ns

tCS

tELWL

Chip Enable Setup Time

0

ns

tCH

tWHEH

Chip Enable Hold Time

0

ns

tWP

tWLWH

Write Pulse Width

35

ns

tWPH

tWHWL

Write Pulse Width High

30

ns

tBS

tFL/HWH

Byte enable high or low set-up time

50

ns

tBH

tWFL/H

Byte enable high or low hold time

70

ns

tGHWL

tGHWL

OE# Hold to WE# Low

0

ns

tBLS

tPHHWH

Block Lock Setup to Write Enable High

70

ns

tBLH

tQVPH

Block Lock Hold from Valid SRD

0

ns

tDAP

tWHRH1

Duration of Auto Program Operation(Byte Mode)

30

300

µs

tDAP

tWHRH1

Duration of Auto Program Operation(Word Mode)

30

300

µs

tDAP

tWHRH1

Duration of Auto Program Operation(Page Mode)

4

80

ms

tDAE

tWHRH2

Duration of Auto Block Erase Operation

150

600

ms

tWHRL

tWHRL

Write Enable High to RY/BY# Low

70

ns

tPS

tPHWL

RP# Recovery to WE# Low

150

ns

Symbol

Parameter

Limits

Units

Flash VCC=3.0-3.6V

-Timing measurements are made under AC waveforms for read operations.

-Typical values at Flash VCC=3.3V and Ta=25

Min.

Typ.

Max.

tWC

tAVAV

Write Cycle Time

70

ns

tAS

tAVEH

Address Setup Time

35

ns

tAH

tEHAX

Address Hold Time

0

ns

tDS

tDVEH

Data Setup Time

35

ns

tDH

tEHDX

Data Hold Time

0

ns

tOEH

tEHGL

OE# Hold from CE# High

10

ns

tWS

tWLEL

Write Enable Setup Time

0

ns

tWH

tEHWH

Write Enable Hold Time

0

ns

tCEP

tELEH

CE# Pulse Width

35

ns

tCEPH

tEHEL

CE#"H" Pulse Width

30

ns

tBS

tFL/HEH

Byte enable high or low set-up time

50

ns

tBH

tEHFL/H

Byte enable high or low hold time

70

ns

tGHEL

tGHEL

OE# Hold to CE# Low

70

ns

tBLS

tPHHEH

Block Lock Setup to Chip Enable High

70

ns

tBLH

tQVPH

Block Lock Hold from Valid SRD

0

ns

tDAP

tEHRH1

Duration of Auto Program Operation(Byte Mode)

30

300

µs

tDAP

tEHRH1

Duration of Auto Program Operation(Word Mode)

30

300

µs

tDAP

tEHRH1

Duration of Auto Program Operation(Page Mode)

4

80

ms

tDAE

tEHRH2

Duration of Auto Block Erase Operation

150

600

ms

tEHRL

tEHRL

CE# High to RY/BY# Low

70

ns

tPS

tPHEL

RP# Recovery to CE# Low

150

ns

Symbol

Parameter

Limits

Units

Flash VCC=3.0-3.6V