M5M29KB/T331AVP

Renesas LSIs

Rev.1.0_48a_bezz

29

33,554,432-BIT (4,194,304-WORD BY 8-BIT /2,097,152-WORD BY 16-BIT)

CMOS 3.3V-ONLY, BLOCK ERASE FLASH MEMORY

Operation Status (WP#=VIH)

1) In case of Page Read, F3H is used instead of FFH in Operation Status (WP#=VIH).

2) Once Page Read mode is set, Page Read mode is kept until power off or RP# is set to VIL.

3) After setting up Clear Page Buffer, D0H enables to clear Page Buffer.

4) To access any bank during Erase All Unlocked Block results Status Register Read.

Although Read Status Register Command and Read Array Command can be issued under Suspend State,

output data make no sense.

Read

Status Register

FFH

FFH

90H

Read/Standby State

(Random Read Mode)

70H

Clear

Status Register

50H

Read Array

(Random Read)

Change Bank

Address

Erase All Unlocked

Blocks Setup

Block Erase

Setup

Word Program

Setup

Page Program

Setup

Page Buffer to

Flash

Setup

Flash to

Page Buffer

Setup

Single Data Load

to Page Buffer

Setup

Clear Page Buffer

Setup

D0H

55H

74H

WD

F1H

0EH

41H

40H

A7H

Erase &

Verify

Read

Status Register

Program &

Verify

Read

Status Register

D0H

Wdi

I=0-127

WD

D0H

Setup State

Internal State

D0H

Ready

Read

Status Register

Suspend

State

D0H

D0H

B0H

B0H

Other

Others

90H

70H

20H

Read Array

(Random Read)

Read

Device Identifier

Read Array

(Random Read)

FFH

70H

Others

3)

D0H

Change

Bank Address

Read State with BGO

Change

Bank Address

Read Array

(Random Read)

Read Array

(Random Read)

Read State with BGO

Back Bank Read State