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M95P16-IXCS/EF Datasheet(PDF) 18 Page - STMicroelectronics |
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M95P16-IXCS/EF Datasheet(HTML) 18 Page - STMicroelectronics |
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18 / 63 page ![]() 5.2 Configuration and Safety register format 5.2.1 Configuration register This register can be read with the RDCR instruction in loop mode. The two non-volatile bits DRV[1:0] can be changed with the WRSR instruction when sending a second data byte. The MSB (b7) is sent first. Table 7. Configuration register format b7 b6 b5 b4 b3 b2 b1 b0 x(1) DRV1 DRV0 x(1) x(1) x(1) x(1) LID 1. x: Don't care bit. The non-volatile DRV1 and DRV0 bits determine the output driver strength (RON of the buffer) for the read operations. The values of DRV1 and DRV0 are given in Table 8. The non-volatile LID bit determines if the identification page is locked or not. When LID = 0, the page can be modified by the user. When LID = 1, the page is locked in read-only mode and cannot be changed. The LID bit can be modified with a WRSR instruction when two data bytes are sent, see Section 6.8 Write Status and Configuration registers (01h). Table 8. Output driver strength DRV1, DRV0 Buffer strength RON (typical) at 3.3 V / 25 °C RON (typical) at 1.8 V / 25 °C 0, 0 High 30 Ω 50 Ω 0, 1 Medium 110 Ω 200 Ω 1, 0 Low 175 Ω 300 Ω 1, 1 Default 50 Ω 90 Ω Note: The delivered state is with buffer strength "Default". 5.2.2 Safety register This 8-bit register can be read with the RDCR instruction in loop mode. All bits are volatile and are read-only. They can be reset with the CLRSF instruction. Table 9. Safety register format b7 b6 b5 b4 b3 b2 b1 b0 PAMAF PUF ERF PRF ECC1C ECC2C ECC3D ECC3DS Protected array modify attempt flag (PAMAF) bit This bit indicates whether a modify operation to a protected memory area has been attempted: • 0: clear • 1: modify attempt detected This is a sticky volatile bit that can be reset to 0 only by issuing Clear safety flag instruction. This flag is cleared to 0 after a successful power-up or by a Software reset instruction. Power-up flag (PUF) bit This bit indicates if power-up operation was completed successfully: • 0: successful • 1: error This volatile bit is refreshed at each power-up, and after a Software reset instruction. The flag is cleared to 0 by the Clear safety flag instruction. M95P16-I M95P16-E Configuration and Safety register format DS13710 - Rev 1 page 18/63 |
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