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M95P16-IXCS/EF Datasheet(PDF) 38 Page - STMicroelectronics |
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M95P16-IXCS/EF Datasheet(HTML) 38 Page - STMicroelectronics |
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38 / 63 page ![]() 6.20 Read SFDP (5Ah) The Read SFDP (RDSFDP) instruction is used to read the SFDP register format. This instruction is initiated by driving the S pin low and shifting the instruction code 5Ah, followed first by a 24-bit address (A23-A0) into the D pin, then by eight additional dummy clock cycles. The code and address bits are latched on the rising edge of the C pin. After the eight dummy clocks are received, the data byte of the SFDP register is shifted out (MSB first) on the Q pin, on the falling edge of C. The address is automatically incremented to the next higher address after each data byte is shifted out, thus enabling a continuous stream of data. This means that the whole SFDP register (512 bytes) can be accessed with a single instruction, as long as the clock continues to cycle. The instruction is completed by driving S high. During the dummy clock cycles the data value on the D pin is Don't care and the Q pin is high-Z. The read SFDP sequence is shown in Figure 30. Figure 30. Read SFDP 0 1 2 3 4 5 6 7 8 9 10 11 29 30 31 C D A23 A22 A21 A2 A1 A0 Q High impedance S 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 High impedance Q7 Q6 Q5 Q4 Q3 Q2 Q1 Q0 Q7 Q6 Q5 Q4 Q3 Q2 Q1 Q0 C D Q S RDSFDP instruction 24-bit address Data out 1 Data out 2 Dummy MS69280V1 M95P16-I M95P16-E Read SFDP (5Ah) DS13710 - Rev 1 page 38/63 |
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