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LLCC68 Datasheet(PDF) 74 Page - Semtech Corporation |
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LLCC68 Datasheet(HTML) 74 Page - Semtech Corporation |
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74 / 106 page ![]() LLCC68 Data Sheet Rev. 1.0 DS.LLCC68.W.APP July 2019 74 of 106 Semtech www.semtech.com 13.3 DIO and IRQ Control Functions 13.3.1 SetDioIrqParams This command is used to set the IRQ flag. 13.3.2 IrqMask The IrqMask masks or unmasks the IRQ which can be triggered by the device. By default, all IRQ are masked (all ‘0’) and the user can enable them one by one (or several at a time) by setting the corresponding mask to ‘1’. 13.3.2.1 DioxMask The interrupt causes a DIO to be set if the corresponding bit in DioxMask and the IrqMask are set. As an example, if bit 0 of IrqMask is set to 1 and bit 0 of DIO1Mask is set to 1 then, a rising edge of IRQ source TxDone will be logged in the IRQ register and will appear at the same time on DIO1. One IRQ can be mapped to all DIOs, one DIO can be mapped to all IRQs (an OR operation is done) but some IRQ sources will be available only on certain modes of operation and frames. In total there are 10 possible interrupt sources depending on the chosen frame and chip mode. Each one of them can be enabled or masked. In addition, every one of them can be mapped to DIO1, DIO2 or DIO3. Note that if DIO2 or DIO3 are used to control the RF Switch or the TCXO, the IRQ will not be generated even if it is mapped to the pins. Table 13-28: SetDioIrqParams SPI Transaction Byte 0 1-2 3-4 5-6 7-8 Data from host SetDioIrqParams (0x08) Irq Mask(15:0) DIO1Mask(15:0) DIO2Mask(15:0) DIO3Mask(15:0) Table 13-29: IRQ Registers Bit IRQ Description Modulation 0 TxDone Packet transmission completed All 1 RxDone Packet received All 2 PreambleDetected Preamble detected All 3 SyncWordValid Valid sync word detected FSK 4 HeaderValid Valid LoRa header received LoRa® 5 HeaderErr LoRa header CRC error LoRa® 6 CrcErr Wrong CRC received All 7 CadDone Channel activity detection finished LoRa® |
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