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MPC8280 Datasheet(PDF) 535 Page - Freescale Semiconductor, Inc |
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MPC8280 Datasheet(HTML) 535 Page - Freescale Semiconductor, Inc |
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535 / 1386 page ![]() MPC8280 PowerQUICC II Family Reference Manual, Rev. 1 Freescale Semiconductor 13-1 Chapter 13 IEEE 1149.1 Test Access Port The MPC8280 provides a dedicated user-accessible test access port (TAP) that is fully compatible with the IEEE 1149.1 Standard Test Access Port and Boundary Scan Architecture. Problems associated with testing high-density circuit boards have led to development of this proposed standard under the sponsorship of the Test Technology Committee of IEEE and the Joint Test Action Group (JTAG). The MPC8280’s implementation supports circuit-board test strategies based on this standard. The TAP consists of five dedicated signal pins—a 16-state TAP controller and two test data registers. A boundary scan register links all device signal pins into a single shift register. The test logic, which is implemented using static logic design, is independent of the device system logic. The MPC8280’s implementation provides the capability to do the following: • Perform boundary scan operations to check circuit-board electrical continuity. • Bypass the MPC8280 for a given circuit-board test by effectively reducing the boundary scan register to a single cell. • Sample the MPC8280 system pins during operation and transparently shift out the result in the boundary-scan register. • Disable the output drive to pins during circuit-board testing. NOTE Precautions must be observed to ensure that the IEEE 1149.1-like test logic does not interfere with nontest operation. 13.1 Overview The MPC8280’s implementation includes a TAP controller, a 4-bit instruction register, and two test registers (a 1-bit bypass register and a 475-bit boundary scan register). Figure 13-1 shows an overview of the MPC8280’s scan chain implementation. |
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