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MPC8280 Datasheet(PDF) 634 Page - Freescale Semiconductor, Inc

Part # MPC8280
Description  PowerQUICC??II Family Reference Manual
PDF  1386 Pages
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Manufacturer  FREESCALE [Freescale Semiconductor, Inc]
Direct Link  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

MPC8280 Datasheet(HTML) 634 Page - Freescale Semiconductor, Inc

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Baud-Rate Generators (BRGs)
MPC8280 PowerQUICC II Family Reference Manual, Rev. 1
17-2
Freescale Semiconductor
frequency. Additionally, the external source option allows a single external frequency to be the source for
multiple BRGs. The external source signals are not synchronized internally before being used by the BRG.
The BRG provides a divide-by-16 option (BRGCx[DIV16]) and a 12-bit prescaler (BRGCx[CD]) to divide
the source clock frequency. The combined source-clock divide factor can be changed on-the-fly; however,
two changes should not occur within two source clock periods.
The prescaler output is sent internally to the bank of clocks and can also be output externally on BRGOn
through the parallel I/O ports. If the BRG divides the clock by an even value, the transitions of BRGOn
always occur on the falling edge of the source clock. If the divide factor is odd, the transitions alternate
between the falling and rising edges of the source clock. Additionally, the output of the BRG can be sent
to the autobaud control block.
17.1
BRG Configuration Registers 1–8 (BRGC
x)
The BRG configuration registers (BRGCx) are shown in Figure 17-2. A reset disables the BRG and drives
the BRGO output clock high. The BRGC can be written at any time with no need to disable the SCCs or
external devices that are connected to BRGO. Configuration changes occur at the end of the next BRG
clock cycle (no spikes occur on the BRGO output clock). BRGC can be changed on-the-fly; however, two
changes should not occur within a time equal to two source clock periods.
0
13
14
15
Field
—
RST
EN
Reset
0000_0000_0000_0000
R/W
R/W
Addr
0x (BRGC1), 0x119F4 (BRGC2), 0x119F8 (BRGC3), 0x119FC (BRGC4),
0x115F0 (BRGC5), 0x115F4 (BRGC6), 0x1115F8 (BRGC7), 0x115FC (BRGC8)
16
17
18
19
30
31
Field
EXTC
ATB
CD
DIV16
Reset
0000_0000_0000_0000
R/W
R/W
Addr
0x119F22 (BRGC1), 0x119F6 (BRGC2), 0x119FA (BRGC3), 0x119FE (BRGC4),
0x115F2 (BRGC5), 0x115F6 (BRGC6), 0x115FA (BRGC7), 0x115FE (BRGC8)
Figure 17-2. Baud-Rate Generator Configuration Registers (BRGC
x)



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