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MPC8280 Datasheet(PDF) 691 Page - Freescale Semiconductor, Inc

Part # MPC8280
Description  PowerQUICC??II Family Reference Manual
PDF  1386 Pages
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Manufacturer  FREESCALE [Freescale Semiconductor, Inc]
Direct Link  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

MPC8280 Datasheet(HTML) 691 Page - Freescale Semiconductor, Inc

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Serial Communications Controllers (SCCs)
MPC8280 PowerQUICC II Family Reference Manual, Rev. 1
Freescale Semiconductor
20-11
•
The half word at offset + 0x2 (data length) holds the number of bytes sent or received.
— For an RxBD, this is the number of bytes the controller writes into the buffer. The CPM writes
the length after received data is placed into the associated buffer and the buffer closed. In
frame-based protocols (but not including SCC transparent operation), this field contains the
total frame length, including CRC bytes. Also, if a received frame’s length, including CRC, is
an exact multiple of MRBLR, the last BD holds no actual data but does contain the total frame
length.
— For a TxBD, this is the number of bytes the controller should send from its buffer. Normally,
this value should be greater than zero. The CPM never modifies this field.
•
The word at offset + 0x4 (buffer pointer) points to the beginning of the buffer in memory (internal
or external).
— For an RxBD, the value must be a multiple of four. (word-aligned)
— For a TxBD, this pointer can be even or odd.
Shown in Figure 20-6, the format of Tx and Rx BDs is the same in each SCC mode. Only the status and
control bits differ for each protocol.
For frame-oriented protocols, a message can reside in as many buffers as necessary. Each buffer has a
maximum length of 65,535 bytes. The CPM does not assume that all buffers of a single frame are currently
linked to the BD table. The CPM does assume, however, that the unlinked buffers are provided by the core
in time to be sent or received; otherwise, an error condition is reported—an underrun error when sending
and a busy error when receiving. Figure 20-7 shows the SCC BD table and buffer structure.
0
15
Offset + 0
Status and Control
Offset + 2
Data Length
Offset + 4
High-Order Buffer Pointer
Offset + 6
Low-Order Buffer Pointer
Figure 20-6. SCC Buffer Descriptors (BDs)



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