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SCC UART Mode

MPC8280 PowerQUICC II Family Reference Manual, Rev. 1

21-22

Freescale Semiconductor

Table 21-13 describes UART SCCS fields.

21.21 SCC UART Programming Example

The following initialization sequence is for the 9,600 baud, 8 data bits, no parity, and stop bit of an SCC

in UART mode assuming a 66-MHz system frequency. BRG1 and SCC2 are used. The controller is

configured with RTS2, CTS2, and CD2 active; CTS2 acts as an automatic flow-control signal.

1. Configure port D pins to enable TXD2 and RXD2. Set PPARD[27,28] and PDIRD[27] and clear

PDIRD[28] and PSORD[27,28].

2. Configure ports C and D pins to enable RTS2, CTS2 and CD2. Set PPARD[26], PPARC[12,13]

and PDIRD[26] and clear PDIRC[12,13], PSORC[12,13] and PSORD[26].

3. Configure BRG1. Write BRGC1 with 0x0001_035A. The DIV16 bit is not used and the divider is

429 (decimal). The resulting BRG1 clock is 16

× the preferred bit rate.

4. Connect BRG1 to SCC2 using the CPM mux. Clear CMXSCR[RS2CS,TS2CS].

5. Connect the SCC2 to the NMSI. Clear CMXSCR[SC2].

6. Write RBASE and TBASE in the SCC2 parameter RAM to point to the RxBD and TxBD tables in

dual-port RAM. Assuming one RxBD at the start of dual-port RAM followed by one TxBD, write

RBASE with 0x0000 and TBASE with 0x0008.

7. Write 0x04A1_0000 to CPCR to execute the INIT RX AND TX PARAMS command for SCC2. This

command updates RBPTR and TBPTR of the serial channel with the new values of RBASE and

TBASE.

8. Write RFCR with 0x10 and TFCR with 0x10 for normal operation.

9. Write MRBLR with the maximum number of bytes per Rx buffer. For this case, assume 16 bytes,

so MRBLR = 0x0010.

10. Write MAX_IDL with 0x0000 in the parameter RAM to disable the maximum idle functionality

for this example.

11. Set BRKCR to 0x0001 so STOP TRANSMIT commands send only one break character.

12. Clear PAREC, FRMEC, NOSEC, and BRKEC in parameter RAM.

13. Clear UADDR1 and UADDR2. They are not used.

14. Clear TOSEQ. It is not used.

15. Write CHARACTER1–8 with 0x8000. They are not used.

16. Write RCCM with 0xC0FF. It is not used.

Table 21-13. UART SCCS Field Descriptions

Bits

Name

Description

0–6

—

Reserved, should be cleared.

Idle status. Set when RXD has been a logic one for at least a full character time.

0 The line is not idle.

1 The line is idle.

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