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MPC8280 Datasheet(PDF) 736 Page - Freescale Semiconductor, Inc

Part # MPC8280
Description  PowerQUICC??II Family Reference Manual
PDF  1386 Pages
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Manufacturer  FREESCALE [Freescale Semiconductor, Inc]
Direct Link  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

MPC8280 Datasheet(HTML) 736 Page - Freescale Semiconductor, Inc

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SCC HDLC Mode
MPC8280 PowerQUICC II Family Reference Manual, Rev. 1
22-6
Freescale Semiconductor
22.7
Handling Errors in the SCC HDLC Controller
The SCC HDLC controller reports frame reception and transmission errors using BDs, error counters, and
the SCCE. Transmission errors are described in Table 22-4.
Reception errors are described in Table 22-5.
Table 22-4. Transmit Errors
Error
Description
Transmitter
Underrun
The channel stops transmitting, closes the buffer, sets TxBD[UN], and generates a TXE interrupt if not
masked. Transmission resumes when a RESTART TRANSMIT command is issued. The SCC send and
receive FIFOs are 32 bytes each.
CTS Lost
during Frame
Transmission
The channel stops transmitting, closes the buffer, sets TxBD[CT], and generates the TXE interrupt if
not masked. Transmission resumes after a RESTART TRANSMIT command. If this error occurs on the
first or second buffer of the frame and PSMR[RTE] = 1, the channel resends the frame when CTS is
reasserted and no error is reported. If collisions are possible, to ensure proper retransmission of
multi-buffer frames, the first two buffers of each frame should in total contain more than 36 bytes for
SCC or 20 bytes for SCC. The channel also increments the retransmission counter RETRC in the
parameter RAM.
Table 22-5. Receive Errors
Error
Description
Overrun
Each SCC maintains an internal FIFO for receiving data. The CP begins programming the SDMA
channel (if the buffer is in external memory) and updating the CRC when a full or partial FIFO’s worth
of data (according to GSMR_H[RFW]) is received in the Rx FIFO. When an Rx FIFO overrun occurs,
the previous byte is overwritten by the next byte. The previous data byte and the frame status are lost.
The channel closes the buffer with RxBD[OV] set and generates an RXF interrupt if not masked. The
receiver then enters hunt mode. Even if an overrun occurs during a frame whose address is not
recognized, an RxBD with data length two is opened to report the overrun and the interrupt is
generated.
CD Lost
during
Frame
Reception
Highest priority error. The channel stops frame reception, closes the buffer, sets RxBD[CD], and
generates the RXF interrupt if not masked. The rest of the frame is lost and other errors are not checked
in that frame. At this point, the receiver enters hunt mode.
Abort
Sequence
Occurs when seven or more consecutive ones are received. When this occurs while receiving a frame,
the channel closes the buffer, sets RxBD[AB] and generates a maskable RXF interrupt. The channel
also increments the abort sequence counter ABTSC. The CRC and nonoctet error status conditions are
not checked on aborted frames. The receiver then enters hunt mode.



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