MPC8280 datasheet(779/1386 Pages) FREESCALE

779 / 1386 page

SCC Transparent Mode

MPC8280 PowerQUICC II Family Reference Manual, Rev. 1

Freescale Semiconductor

24-5

24.4.1.3

Transparent Mode without Explicit Synchronization

If there is no need to synchronize the transparent controller at a specific point, the user can ‘fake’

synchronization in one of the following ways:

•

Tie a parallel I/O pin to the CTS and CD lines. Then, after enabling the receiver and transmitter,

provide a falling edge by manipulating the I/O pin in software.

•

Enable the receiver and transmitter for the SCC in loopback mode and then change

GSMR_L[DIAG] to 0b00 while the transmitter and receiver and enabled.

24.4.2

Synchronization and the TSA

A transparent-mode SCC using the time-slot assigner can synchronize either on a user-defined inline

pattern or by inherent synchronization.

Note that when using the TSA, a newly-enabled transmitter sends from 10 to 15 frames of idles before

sending the actual transparent data due to startup requirements of the TDM. Therefore, when loopback

testing through the TDM, expect to receive several bytes of 0xFF before the actual data.

24.4.2.1

Inline Synchronization Pattern

The receiver can be programmed to begin receiving data into the receive buffers only after a specified data

pattern arrives. To synchronize on an inline pattern:

•

Set GSMR_H[SYNL].

•

Program the DSR with the desired pattern.

•

Clear GSMR_H[CDP].

•

Set GSMR_H[CTSP, CTSS, CDS].

If GSMR_H[TXSY] is also used, the transmitter begins transmission eight clocks after the receiver

achieves synchronization.

24.4.2.2

Inherent Synchronization

Inherent synchronization assumes synchronization by default when the channel is enabled; all data sent

from the TDM to the SCC is received. To implement inherent synchronization:

•

Set GSMR_H[CDP, CDS, CTSP, CTSS].

If these bits are not set, the received bit stream will be bit-shifted. The SCC loses the first received bit

because CD and CTS are treated as asynchronous signals.

24.4.3

End of Frame Detection

An end of frame cannot be detected in the transparent data stream since there is no defined closing flag in

transparent mode. Therefore, if framing is needed, the user must use the CD line to alert the transparent

controller of an end of frame.

MPC8280 Datasheet(PDF) 779 Page - Freescale Semiconductor, Inc

MPC8280 Datasheet(HTML) 779 Page - Freescale Semiconductor, Inc

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL