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MPC8280 Datasheet(PDF) 780 Page - Freescale Semiconductor, Inc |
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MPC8280 Datasheet(HTML) 780 Page - Freescale Semiconductor, Inc |
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780 / 1386 page ![]() SCC Transparent Mode MPC8280 PowerQUICC II Family Reference Manual, Rev. 1 24-6 Freescale Semiconductor 24.5 CRC Calculation in Transparent Mode The CRC calculations follow the ITU/IEEE standard. The CRC is calculated on the transmitted data stream; that is, from lsb to msb for non-bit-reversed (GSMR_H[REVD] = 0) and from msb to lsb for bit-reversed (GSMR_H[REVD] = 1) transmission. The appended CRC is sent msb to lsb. When receiving, the CRC is calculated as the incoming bits arrive. The optional reversal of data (GSMR_H[REVD] = 1) is done just before data is stored in memory (after the CRC calculation). 24.6 SCC Transparent Parameter RAM For transparent mode, the protocol-specific area of the SCC parameter RAM is mapped as in Table 24-2. CRC_P and CRC_C overlap with the CRC parameters for the HDLC-based protocols. However, this overlap is not detrimental since the CRC constant is used only for the receiver and the CRC preset is used only for the transmitter, so only one entry is required for each. Thus, the user can choose an HDLC transmitter with a transparent receiver or a transparent transmitter with an HDLC receiver. 24.7 SCC Transparent Commands The following transmit and receive commands are issued to the CP command register. Table 24-3 describes transmit commands. Table 24-2. SCC Transparent Parameter RAM Memory Map Offset1 1 From SCC base address. See Section 20.3.1, “SCC Base Addresses.” Name Width Description 0x30 CRC_P Long CRC preset for totally transparent. For the 16-bit CRC-CCITT, initialize with 0x0000_FFFF. For the 32-bit CRC-CCITT, initialize with 0xFFFF_FFFF and for the CRC-16, initialize with ones (0x0000_FFFF) or zeros (0x0000_0000). 0x34 CRC_C Long CRC constant for totally transparent receiver. For the 16-bit CRC-CCITT, initialize with 0x0000_F0B8. For the 32-bit CRC-CCITT, CRC_C initialize with 0xDEBB_20E3 and for the CRC-16, which is normally used with BISYNC, initialize with 0x0000_0000. Table 24-3. Transmit Commands Command Description STOP TRANSMIT After hardware or software is reset and the channel is enabled in the GSMR, the channel is in transmit enable mode and starts polling the first BD every 64 clocks (or immediately if TODR[TOD] = 1). STOP TRANSMIT disables frame transmission on the transmit channel. If the transparent controller receives the command during frame transmission, transmission is aborted after a maximum of 64 additional bits and the transmit FIFO is flushed. The current TxBD pointer (TBPTR) is not advanced, no new BD is accessed and no new buffers are sent for this channel. The transmitter will send idles. GRACEFUL STOP TRANSMIT Stops transmission smoothly, rather than abruptly, in much the same way that the regular STOP TRANSMIT command stops. It stops transmission after the current frame finishes or immediately if no frame is being sent. A transparent frame is not complete until a BD with TxBD[L] set has its buffer completely sent. SCCE[GRA] is set once transmission stops; transmit parameters and their BDs can then be modified. The current TxBD pointer (TBPTR) advances to the next TxBD in the table. Transmission resumes once TxBD[R] is set and a RESTART TRANSMIT command is issued. |
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