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MPC8280 Datasheet(PDF) 809 Page - Freescale Semiconductor, Inc

Part # MPC8280
Description  PowerQUICC??II Family Reference Manual
PDF  1386 Pages
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Manufacturer  FREESCALE [Freescale Semiconductor, Inc]
Direct Link  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

MPC8280 Datasheet(HTML) 809 Page - Freescale Semiconductor, Inc

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SCC Ethernet Mode
MPC8280 PowerQUICC II Family Reference Manual, Rev. 1
Freescale Semiconductor
25-21
Figure 25-10 shows an example of interrupts that can be generated in Ethernet protocol.
Figure 25-10. Ethernet Interrupt Events Example
Note that the SCC status register (SCCS) cannot be used with the Ethernet protocol. The current state of
the RENA and CLSN signals can be found in the parallel I/O ports.
13
BSY
Busy condition. Set when a frame is received and discarded due to a lack of buffers.
14
TXB
Tx buffer. Set when a buffer has been sent on the Ethernet channel.
15
RXB
Rx buffer. Set when a buffer that was not a complete frame was received on the Ethernet channel.
Table 25-9. SCCE/SCCM Field Descriptions (continued)
Bits
Name
Description
RXB
Line Idle
Stored in Rx Buffer
RXD
RENA
Frame
Received in Ethernet
Time
Line Idle
TXD
TENA
Frame
Transmitted by Ethernet
CLSN
TXB, GRA
TXB
Line Idle
Line Idle
Stored in Tx Buffer
NOTES:
Ethernet SCCE
Events
1. RXB event assumes receive buffers are 64 bytes each.
2. The RENA events, if required, must be programmed in the parallel I/O ports, not in the SCC itself.
3. The RxF interrupt may occur later than RENA due to receive FIFO latency.
NOTES:
Ethernet SCCE
Events
1. TXB events assume the frame required two transmit buffers.
2. The GRA event assumes a GRACEFUL STOP TRANSMIT command was issued during frame transmission.
PSFD DA SA
CR
RXF
3. The TENA or CLSN events, if required, must be programmed in the parallel I/O ports, not in the SCC itself.
T/L
D
PSFD DA SA
CR
T/L
D
LEGEND:
P = Preamble, SFD = Start frame delimiter, DA and SA = Source/Destination address,
T/L = Type/Length, D = Data, CR = CRC bytes



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