MPC8280 datasheet(807/1386 Pages) FREESCALE

807 / 1386 page

SCC Ethernet Mode

MPC8280 PowerQUICC II Family Reference Manual, Rev. 1

Freescale Semiconductor

25-19

indicate errors so the core knows buffers have been serviced. Figure 25-8 represents an SCC ethernet

transmit buffer descriptor.

Table 25-8 describes TxBD status and control fields.

0123

456

789

Offset + 0

RPAD

DEF

CSL

Offset + 2

Data Length

Offset + 4

Tx Data Buffer Pointer

Offset + 6

Figure 25-8. SCC Ethernet TxBD

Table 25-8. SCC Ethernet TxBD Status and Control Field Descriptions

Bits

Name

Description

Ready.

0 The buffer is not ready for transmission. The user can update this BD or its data buffer. The CPM

clears R after the buffer has been sent or after an error occurs.

1 The user-prepared buffer has not been sent or is currently being sent. Do not modify this BD.

PAD

Short frame padding. Valid only when L is set. Otherwise, it is ignored.

0 Do not add PADs to short frames.

1 Add PADs to short frames. Pad bytes are inserted until the length of the sent frame equals the

MINFLR and they are stored in PADs in the parameter RAM.

Wrap (final BD in table).

0 Not the last BD in the table.

1 Last BD in the table. After this buffer is used, the CPM receives incoming data into the first BD

that TBASE points to in the table. The number of TxBDs in this table is determined only by the W

bit and overall space constraints of the dual-port RAM.

Note: The TxBD table must contain more than one BD in Ethernet mode.

Interrupt.

0 No interrupt is generated after this buffer is serviced; SCCE[TXE] is unaffected.

1 SCCE[TXB] or SCCE[TXE] is set after this buffer is serviced. These bits can cause interrupts if

they are enabled.

Last.

0 Not the last buffer in the transmit frame.

1 Last buffer in the transmit frame.

Tx CRC. Valid only when L = 1. Otherwise, it is ignored.

0 End transmission immediately after the last data byte.

1 Transmit the CRC sequence after the last data byte.

DEF

Defer indication. The frame was deferred before being sent successfully, that is, the transmitter had

to wait for carrier sense before sending because the line was busy. This is not a collision indication;

collisions are indicated in RC.

Heartbeat. Set when the collision input was not asserted within 20 transmit clocks after

transmission. HB cannot be set unless PSMR[HBC] = 1. The SCC writes HB after it finishes sending

the buffer.

Late collision. Set when a collision occurred after the number of bytes defined for PSMR[LCW] are

sent. The Ethernet controller stops sending and writes this bit after it finishes sending the buffer.

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