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MPC8280 Datasheet(PDF) 854 Page - Freescale Semiconductor, Inc

Part # MPC8280
Description  PowerQUICC??II Family Reference Manual
PDF  1386 Pages
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Manufacturer  FREESCALE [Freescale Semiconductor, Inc]
Direct Link  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

MPC8280 Datasheet(HTML) 854 Page - Freescale Semiconductor, Inc

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Universal Serial Bus Controller
MPC8280 PowerQUICC II Family Reference Manual, Rev. 1
27-38
Freescale Semiconductor
10. Write 0x1818_0100 to DPRAM+0x524 to set up the RFCR, TFCR, and MRBLR fields of the
endpoint 2 parameter RAM.
11. Write 0x0008_0028 to DPRAM+0x528 to set up the RBPTR and TBPTR fields of the endpoint 2
parameter RAM.
12. Clear the TSTATE field of the endpoint 2 parameter RAM.
13. Write 0xB800_0040 to DPRAM+0x20 to set up the TrBD[Status and Control, Data Length] fields
of the host endpoint.
14. Write DPRAM+0x100 to DPRAM+0x24 to set up the TrBD[Buffer Pointer] field of the host
endpoint.
15. Write 0x8085 to DPRAM+0x28 to set up the TrBD token fields of the host endpoint.
16. Write 0xBC80_0003 to DPRAM+0x28 to set up the TxBD[Status and Control, Data Length] fields
of the function endpoint.
17. Write DPRAM+0x210 to DPRAM+0x2C to set up the TxBD[Buffer Pointer] field of the function
endpoint.
18. Write 0xABCD_1234 to DPRAM+0x210 to set up the function endpoint Tx data pattern.
19. Write 0x0030 to USEP1 for the host: non-isochronous transfer, multi-packet, transaction-level
interface.
20. Write 0x1100 to USEP2 for the function: interrupt transfer, one packet only.
21. Write 0x06 to USMOD for full-speed 12 Mbps signaling, local loopback configuration (test and
host modes set), and disable the USB.
22. Write 0x05 to the USAD for slave address 5.
23. Set USMOD[EN] to enable the USB controller.
24. Write 0x81 to the USCOM to start filling the Tx FIFO with endpoint 2 data to be ready for
transmission when an IN token is received.
25. Write 0x80 to the USCOM to start transmitting the IN token.
The expected results are as follows:
•
TrBD[Status and Control] of the host endpoint should contain 0x3800.
•
TrBD[Data Length] of the host endpoint should contain 0x0005.
•
TxBD[Status and Control] of endpoint 2 should contain 0x3C80.
•
TxBD[Data Length] of endpoint 2 should contain 0x0003.
•
The receive buffer of the host endpoint should contain 0xABCD_122B, 0x42xx_xxxx.



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