MPC8280 datasheet(853/1386 Pages) FREESCALE

853 / 1386 page

Universal Serial Bus Controller

MPC8280 PowerQUICC II Family Reference Manual, Rev. 1

Freescale Semiconductor

27-37

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TxBD[Data Length] of endpoint 2 should contain 0x0003.

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RxBD[Status and Control] of the host endpoint should contain 0x3C00.

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RxBD[Data Length] of the host endpoint should contain 0x0005.

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The receive buffer of the host endpoint should contain 0xABCD_122B, 0x42xx_xxxx.

27.11 Programming the USB Host Controller (Transaction-Level)

The MPC8280 implementation of a USB host uses the endpoint represented by USEP1 to control the host

transmission and reception. The other endpoints are typically not used, except for testing purposes

(loop-back).

Programming the USB controller to act as host is similar to configuring an endpoint for function operation.

A general outline of how to program the host controller follows. (A more detailed example can be found

in Section 27.11.1, “USB Host Controller Initialization Example.”)

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Set the host bit in the mode register (USBMOD[HOST] = 1) to configure the controller as a host.

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Set the multi-frame bit in the endpoint configuration register (USEP1[MF] = 1) to allow

SETUP/OUT tokens and DATA0/DATA1 packets to be sent back-to-back.

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Set USEP1[RTE] to enable the transaction-level interface.

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Clock the USB host controller as a high speed function (48-MHz reference clock).

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For low-speed transactions with an external hub, set TrBD[LSP]. This causes the USB host

controller to generate a preamble (PRE token) at full speed before changing the transmit rate to low

speed and sending the token. After completion of the transaction, the host returns to full-speed

operation.

27.11.1 USB Host Controller Initialization Example

The following is a local loopback example initialization sequence for the USB controller operating as a

host. It can be used to set up the host endpoint and one function endpoint to demonstrate an IN token

transaction.

1. Program CMXSCR to provide a 48 MHz clock to the USB controller.

2. Program the Port Registers to select USBRXD, USBRXP, USBRXN, USBTXP, USBTXN, and

USBOE.

3. Write (DPRAM+0x500) to EP1PTR, (DPRAM+0x520) to EP2PTR to set up the endpoint pointers.

4. Write 0x0020 to DPRAM+0x502 to set up the TBASE field of the host endpoint parameter RAM.

5. Write 0x1818 to DPRAM+0x504 to set up the RFCR and TFCR fields of the host endpoint

parameter RAM.

6. Write 0x0020 to DPRAM+0x50a to set up the TBPTR field of the host endpoint parameter RAM.

7. Clear the TSTATE field of the host endpoint parameter RAM.

8. Initialize the HIMMR field of the host endpoint parameter RAM.

9. Write 0x0008_0028 to DPRAM+0x520 to set up the RBASE and TBASE fields of the endpoint 2

parameter RAM.

MPC8280 Datasheet(PDF) 853 Page - Freescale Semiconductor, Inc

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