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MPC8280 Datasheet(PDF) 978 Page - Freescale Semiconductor, Inc |
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MPC8280 Datasheet(HTML) 978 Page - Freescale Semiconductor, Inc |
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978 / 1386 page ![]() ATM Controller and AAL0, AAL1, and AAL5 MPC8280 PowerQUICC II Family Reference Manual, Rev. 1 31-18 Freescale Semiconductor Figure 31-8 shows the VC pointer address compression from Table 31-6. Figure 31-8. VC Pointer Address Compression 31.4.3 Misinserted Cells If the address lookup mechanism cannot find a match (MS=1), the cell is discarded and ATM layer statistics are updated, as described in Section 31.8, “ATM Layer Statistics.” 31.4.4 Receive Raw Cell Queue Channel one in the RCT is reserved as a raw cell queue. The user should program channel one to operate in AAL0 protocol. The receive raw cell queue is used for removing management cells from the regular cell flow to the host. When a management cell is sent to the receive raw cell queue, the CP sets RxBD[OAM]. The ALL0 BD specifies the channel code associated with the current OAM cell. The following are optionally removed from the regular flow and sent to the raw cell queue: • Segment F5 OAM (PTI = 0b100). To enable F5 segment filtering, set RCT[SEGF]. • End-to-end F5 OAM (PTI = 0b101). To enable F5 end-to-end filtering, set RCT[ENDF]. • RM cells (PTI = 0b110). When ABR flow is enabled the cells are terminated internally; otherwise, they are sent to the raw cell queue. • Reserved PTI value (PTI = 0b111). Always sent to the raw cell queue. • VCI value: 3, 4, 6, 7–15. To enable VCI filtering set the associated bit in the VCIF entry in the parameter RAM. 0 0 0 0 0 0 1 1 0 0 0 1 0 0 0 0 0 0 1 1 0 1 1 1 0 0 1 VCI VC_MASK VC Pointer 1 1 0000 0000 |
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