MPC8280 datasheet(979/1386 Pages) FREESCALE

979 / 1386 page

ATM Controller and AAL0, AAL1, and AAL5

MPC8280 PowerQUICC II Family Reference Manual, Rev. 1

Freescale Semiconductor

31-19

Figure 31-9 shows a flowchart of the ATM cell flow.

Figure 31-9. ATM Address Recognition Flowchart

NOTE

Even reserved VCI channels should appear in the CAM or address

compression tables; otherwise, a cell on a reserved channel will be

considered misinserted.

31.5

Available Bit Rate (ABR) Flow Control

While CBR service provides a fixed bandwidth and is useful for real-time applications with strictly

bounded end-to-end cell transfer delay and cell-delay variation, ABR service is intended for data

applications that can adapt to time-varying bandwidth and can tolerate significant cell transfer delay and

cell delay variation. The MPC8280 implements the two following mechanisms defined by the ATM Forum

TM 4.0 rate-based flow control.

•

Explicit forward congestion indication (EFCI). The network supplies binary indication of whether

congestion occurred along the connection path. This information is carried in the PTI field of the

ATM cell header (similar to that used in frame relay). The source initially clears each ATM cell’s

EFCI bit, but as the cell passes through the connection, any congested node can set it. The

MPC8280 detects this indication and sets the congestion indication (CI) bit in the next backwards

RM cell to signal the source end station to reduce its transmission rate.

•

Explicit rate (ER) feedback. The network carries explicit bandwidth information, to allow the

source to adjust its rate. The source sends forward RM cells specifying its chosen transmit rate

PTI=1xx or

VCI=3,4,6,7-15

and filter enable

Yes

Check

address

Match

Yes

Discard

cell

Send cell to VC

queue

Send cell to raw

cell queue

MPC8280 Datasheet(PDF) 979 Page - Freescale Semiconductor, Inc