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MPC8280 Datasheet(PDF) 1012 Page - Freescale Semiconductor, Inc

Part # MPC8280
Description  PowerQUICC??II Family Reference Manual
PDF  1386 Pages
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Manufacturer  FREESCALE [Freescale Semiconductor, Inc]
Direct Link  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

MPC8280 Datasheet(HTML) 1012 Page - Freescale Semiconductor, Inc

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ATM Controller and AAL0, AAL1, and AAL5
MPC8280 PowerQUICC II Family Reference Manual, Rev. 1
31-52
Freescale Semiconductor
13
VCON
Virtual channel is on.
Should be set by the host before it issues an ATM TRANSMIT command. When the host
sets TCT[STPT] (stop transmit), the CP deactivates this channel and clears VCON
when the channel is next encountered in the APC scheduling table. The host can issue
another ATM TRANSMIT command only after the CP clears VCON.
14–15
INTQ
Points to one of four interrupt queues available.
0x02
0
—
Internal use only. Should be cleared.
1
INF
Used for AAL5 Only. Indicates the transmitter state. Initialize to 0
0 In idle state.
1 In AAL5 frame transmission state.
2–11
—
Internal use only. Should be cleared.
12
ABRF
Used for AAL5 Only.
0 ABR Flow control is disabled.
1 ABR Flow control is enabled.
13–15
AAL
AAL type
000 AAL0—Reassembly with no adaptation layer
001 AAL1—ATM adaptation layer 1 protocol
010 AAL5—ATM adaptation layer 5 protocol
100 AAL2—ATM adaptation layer 2 protocol. Refer to Chapter 33, “ATM AAL2.”
101 AAL1_CES—Refer to Chapter 32, “ATM AAL1 Circuit Emulation Service.”
All others reserved.
0x04
—
TxDBPTR
Tx data buffer pointer. Holds the real address of the current position in the Tx buffer.
0x08
—
TBDCNT
Transmit BD count. Counts the remaining data to transmit in the current transmit buffer.
Its initial value is loaded from the data length field of the TxBD when a new buffer is
open; its value is subtracted for any transmitted cell associated with this channel.
0x0A
—
TBD_OffSe
t
Transmit BD offset. Holds offset from TBD_BASE of the current BD. Should be cleared
initially.
0x0C
0–7
Rate
Reminder
Rate remainder. Used by the APC to hold the rate remainder after adding the pace
fraction to the additive channel rate. Should be cleared initially.
8–15
PCR
Fraction
Peak cell rate fraction. Holds the peak cell rate fraction of this channel in units of 1/256
slot. If this is an ABR channel, this field is automatically updated by the CP.
0x0E
—
PCR
Peak cell rate. Holds the peak cell rate (in units of APC slots) permitted for this channel
according to the traffic contract. Note that for an ABR channel, the CP automatically
updates PCR to the ACR value.
0x10
—
—
Protocol-specific
0x16
—
APCLC
APC linked channel. Used by the CP. Initialize to 0 (null pointer).
0x18
—
ATMCH
ATM cell header. Holds the full (4-byte) ATM cell header of the current channel. The
transmitter appends ATMCH to the cell payload during transmission.
Table 31-21. TCT Field Descriptions (continued)
Offset
Bits
Name
Description



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