MPC8280 datasheet(1015/1386 Pages) FREESCALE

1015 / 1386 page

ATM Controller and AAL0, AAL1, and AAL5

MPC8280 PowerQUICC II Family Reference Manual, Rev. 1

Freescale Semiconductor

31-55

31.10.2.3.3

AAL0 Protocol-Specific TCT

Figure 31-33 shows the AAL0 protocol-specific TCT.

Table 31-24 describes AAL0 protocol-specific TCT fields.

31.10.2.3.4

AAL1 CES Protocol-Specific TCT

Refer to Section 32.9.2.1, “AAL1 CES Protocol-Specific TCT.”

31.10.2.3.5

AAL2 Protocol-Specific TCT

Refer to Section 33.3.5.1, “AAL2 Protocol-Specific TCT.”

0x14

0–3

SRTS_TMP Before a cell with SN = 1 is sent, the CP reads the SRTS code from external SRTS logic,

writes it to SRTS_TMP, and then inserts SRTS_TMP into the next four cells with an odd

SN.

4–15

Structured pointer. Used by the CP to calculate the structured pointer. Should be

cleared initially. Structured format only.

Offset + 0x10

—

CR10

—

ACHC

—

Offset + 0x12

—

Offset + 0x14

Figure 31-33. AAL0 Protocol-Specific TCT

Table 31-24. AAL0-Specific TCT Field Descriptions

Offset

Bits

Name

Description

0x10

0–7

—

Reserved, should be cleared.

Must be 0.

CR10

CRC-10

0 CRC10 insertion is disabled.

1 CRC10 insertion is enabled.

—

Reserved, should be cleared.

ACHC

ATM cell header change

0 Normal operation ATM cell header is taken from AAL0 buffer.

1 VPI/VCI (28 bits) are taken from TCT.

12–15

—

Reserved, should be cleared.

0x12–0x14

—

Reserved, should be cleared.

Table 31-23. AAL1 Protocol-Specific TCT Field Descriptions (continued)

Offset

Bits

Name

Description

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