MPC8280 datasheet(1059/1386 Pages) FREESCALE

1059 / 1386 page

ATM Controller and AAL0, AAL1, and AAL5

MPC8280 PowerQUICC II Family Reference Manual, Rev. 1

Freescale Semiconductor

31-99

Set FTIRRx_PHY0[TRM] to enable the transmit internal rate mode and clear FTIRRx_PHY0[Initial

Value] since there is no need to further divide the BRG. See Section 31.15.1.1, “FCC Transmit Internal

Rate Register (FTIRRx).”

In external rate mode, however, the transmit cell request frequency is determined by the PHY’s maximum

rate, not by internal FCC counters. If an OC-3 PHY is used with the ATM controller in external rate mode,

the requests must be generated every 362 CPM clocks (assuming a 133-MHz CPM clock). If only 100

Mbps is used for real data, 36% of the transmit cell requests consume CPM processing time sending idle

cells.

31.17.2 APC Configuration

Maximizing the number of cells per slot (CPS) and minimizing the priority levels defined in the APC data

structure improves CPM performance:

•

Cells per slot. CPS defines the maximum number of ATM cells allowed to be sent during a time

slot. (See Section 31.3.3.1, “Determining the Cells Per Slot (CPS) in a Scheduling Table.”) The

scheduling algorithm is more efficient sending multiple cells per time slot using the linked-channel

field. Therefore, choose the maximum number of cells per slot allowed by the application.

•

Priority levels. The user can configure the APC data structure to have from one to eight priority

levels. (See Section 31.3.6, “Determining the Priority of an ATM Channel.”) For each time slot,

the scheduling algorithm scans all priority levels and maintains pointers for each level. Therefore,

enable only the minimum number of priority levels required.

31.17.3 Buffer Configuration

Using statically allocated buffers of optimal sizes also improves CPM performance:

•

Buffer size. Opening and closing buffer descriptors consumes CPM processing time. Because

smaller buffers require more opening and closing of BDs, the optimal buffer size for maximum

CPM performance is equal to the packet size (an AAL5 frame, for example).

•

Free buffer pool. When the free buffer pool is used, the CPM dynamically allocates buffers and

links them to a channel’s BD. In static buffer allocation, the core assigns a fixed data buffer to each

BD. (See Section 31.10.5.2, “Receive Buffer Operation.”) When allowed by the application, use

static buffer allocation to increase CPM performance.

MPC8280 Datasheet(PDF) 1059 Page - Freescale Semiconductor, Inc