MPC8280 datasheet(1070/1386 Pages) FREESCALE

1070 / 1386 page

ATM AAL1 Circuit Emulation Service

MPC8280 PowerQUICC II Family Reference Manual, Rev. 1

32-10

Freescale Semiconductor

32.4.5

Trunk Condition

According to the Bellcore standard, the interworking function should be able to transmit special payloads

on both the ATM and TDM channels to signal alarm conditions (bellcore TR-NWT-000170). The trunk

condition can be generated under core control. The core may deliver buffers containing special data (trunk

condition payload) to the ATM controller or MCC or even overwrite data buffers being used by the

channels.

32.4.6

Channel Associated Signaling (CAS) Support

For applications requiring channel associated signaling (CAS) support, the CAS manipulation is done by

an external framer. The MCC should be programmed to receive or transmit the internal CAS block

transparently through the external framer’s serial interface. The internal CAS block (depicted in

Figure 32-8) can be adjusted to comply with a specific framer’s serial interface. (See Section 32.4.7.1,

“CAS Routing Table.”)

Figure 32-7. Mapping CAS Data on a Serial Interface

The MCC and ATM CAS are synchronized with the superframe block boundary. At the ATM side, the

structured block size should be set to the superframe block size plus the size of the CAS block so that the

structured pointer inserted by the ATM controller points to the start of the structured data block. At the

MCC side, the MCC is synchronized with the frame sync signal; the external framer has the ability to place

the signaling information at the appropriate place in a superframe. The MPC8280 supports an automatic

mode for forwarding the signaling information from the TDM to the ATM and vice versa. The ATM

controller maintains two CAS blocks per trunk (eight total). One contains the signaling information

unpacked from the AAL1 cells (ATM-to-TDM), and the other contains the signaling information fetched

from an external framer (TDM-to-ATM). All 8 CAS blocks reside in the internal RAM.

Framer serial interface for T1 signaling format

Ch 1

Ch 2

Ch 3

XXXX ABCD

• • • • • • • •

Framer serial interface for T1 signaling format (SF)

Ch 1

Ch 2

Ch 3

Ch 24

XXXX ABA’B’

• • • • • • • •

Framer serial interface for E1 signaling format

Ch 1

Ch 2

Ch 3

Ch 32

XXXX ABCD

• • • • • • • •

8-bits per channel

Note: The MCC should capture the signaling data on the last frame of a super frame.

See Section 1.4.7.2, “TDM-to-ATM CAS Support”.

Ch 24

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