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MPC8280 Datasheet(PDF) 1083 Page - Freescale Semiconductor, Inc |
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MPC8280 Datasheet(HTML) 1083 Page - Freescale Semiconductor, Inc |
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1083 / 1386 page ![]() ATM AAL1 Circuit Emulation Service MPC8280 PowerQUICC II Family Reference Manual, Rev. 1 Freescale Semiconductor 32-23 0x46 INT_RCT_BASE Hword Internal receive connection table base. User-defined. 0x48 INT_TCT_BASE Hword Internal transmit connection table base. User-defined. 0x4A INT_TCTE_BASE Hword Internal transmit connection table extension base. User-defined. Note that the TCT extension is not needed in AAL1 CES and that the AAL1 CES microcode uses this Hword to point to a CAS routing table. 0x4C — Word Reserved, should be cleared during initialization. 0x50 EXT_RCT_BASE Word External receive connection table base. User-defined. 0x54 EXT_TCT_BASE Word External transmit connection table base. User-defined. 0x58 EXT_TCTE_BASE Word External transmit connection table extension base. User-defined. Note that the TCT extension is not needed in AAL1 CES and that the AAL1 CES microcode uses this Hword to point to a CAS routing table. 0x5C UEAD_OFFSET Hword User-defined cells mode only. The offset of the UEAD entry in the UDC extra header. Should be an even address. If RCT[BO]=01 UEAD_OFFSET should be in little-endian format. For example if UEAD entry is the first half word of the extra header in external memory, UEAD_OFFSET should be set to 2 (second half word entry in internal RAM). 0x5E — Hword Reserved, should be cleared during initialization. 0x60 PMT_BASE Hword Performance monitoring table base. User-defined. 0x62 APCP_BASE Hword APC parameters table base address. User-defined. 0x64 FBT_BASE Hword Free buffer pool parameters table base. User-defined. 0x66 INTT_BASE Hword Interrupt queue parameters table base. User-defined. 0x5E — — Reserved, should be cleared during initialization. 0x6A UNI_STATT_BASE Hword UNI statistics table base. User-defined. 0x6C BD_BASE_EXT Word BD table base address extension. BD_BASE_EXT[0–7] holds the 8 left bits of the Rx/Tx BD table base address. BD_BASE_EXT[8–31] should be zero. User-defined. 0x70 VPT_BASE / EXT_CAM_BASE Word Base address of the address compression VP table/external CAM. User-defined. 0x74 VCT_BASE Word Base address of the address compression VC table. User-defined. 0x78 VPT1_BASE / EXT_CAM1_BASE Word Base address of the address compression VP1 table/EXT CAM1. User-defined. 0x7C VCT1_BASE Word Base address of the address compression VC1 table. User-defined. 0x80 VP_MASK Hword VP mask for address compression lookup. User-defined. 0x82 VCI_Filtering Hword VCI filtering enable bits. When cells with VCI = 3, 4, 6, 7-15 are received and the associated VCI_Filtering bit = 1 the cell is sent to the raw cell queue. VCI=3 is associated with VCI_Filtering[3], VCI=15 is associated with VCI_Filtering[15]. VCI_Filtering[0–2, 5] should be zero. See Section 31.10.1.2, “VCI Filtering (VCIF).” Table 32-3. AAL1 CES Field Descriptions (continued) Offset Name Width Description |
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