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MPC8280 Datasheet(PDF) 1187 Page - Freescale Semiconductor, Inc

Part # MPC8280
Description  PowerQUICC??II Family Reference Manual
PDF  1386 Pages
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Manufacturer  FREESCALE [Freescale Semiconductor, Inc]
Direct Link  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

MPC8280 Datasheet(HTML) 1187 Page - Freescale Semiconductor, Inc

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Inverse Multiplexing for ATM (IMA)
MPC8280 PowerQUICC II Family Reference Manual, Rev. 1
Freescale Semiconductor
34-41
34.4.5.2.1
IMA Link Receive Control (ILRCNTL)
The fields of the ILRCNTL register are shown in Figure 34-24
Table 34-20 describes the ILRCNTL bit fields.
0x18
ANOMALY_CTR
Byte
Anomaly counter. Microcode-managed parameter. Initialize to zero at
link startup.
0x19
ALPHABETA_CTR
Byte
Alpha/beta counter. Microcode-managed parameter. Initialize to zero at
link startup.
0x1A
GAMMA_CTR
Byte
Gamma counter. Microcode-managed parameter. Initialize to zero at
link startup.
0x1C
DEFECT_CTR
Word
Defect counter. This counter is active while the link is in the
Loss-of-IMA-Frame (LIF) state and is used to ensure IFSD interrupts
are generated for every GAMMA+2 frames. Software can use the
period interrupt issued by this counter in order to determine if the link
is taking too long to synchronize. The DEFECT_CTR is active before
IFSM reaches SYNC. It starts counting from the first cell received and
will count from 0 to (GAMMA+2) x M. When it reaches (GAMMA+2) x M
an IFSD interrupt is generated and the counter is reset. Upon reception
of the next cell it starts to count again and subsequent interrupts are
generated. Microcode managed parameter. Initialize to zero at link
startup.
1 Boldfaced entries indicate parameters that must be initialized by the user. All other parameters are
managed by the microcode and should be initialized to zero unless otherwise stated.
012345
7
Field
GA
SES
TRL
RXSC
IGNUM
89
10
15
Field
Add_new
MON_ICP
—
Figure 34-24. IMA Link Receive Control (ILRCNTL)
Table 34-20. ILRCNTL Field Descriptions
Bits
Name
Description
0
GA
Group assigned flag. Set by software after group parameters have been validated.
0 Group unassigned.
1 Group assigned.
1
SES
Severely errored seconds. Set by software when a severely errored second indication is
detected. When set, causes the receive stuff event counter and ICP violation counter to stop
counting.
2
TRL
Identifies this link in the group as the Timing Reference Link (NOTE: Only one link per group
can be selected as the TRL).
Table 34-19. IMA Link Receive Table Entry1 (continued)
Offset
Name
Width
Description



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